DS50PCI401 Datasheet, PDF (12/32 Pages) National Semiconductor (TI) – 2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Transceiver with Equalization and De-Emphasis

Symbol
EQUALIZATION
DJE1
DJE2
DJE3
DJE4
RJ
DE-EMPHASIS
DJD1
DJD2
DJD3
DJD4
Parameter
Conditions
Min
Residual Deterministic
Jitter at 5 Gbps
42” of 5 mil stripline FR4,
EQ1,0=F,1; K28.5 pattern,
DEMx=0, Tx Launch Amplitude
1.0 Vp-p, SD_TH=F. (Notes 2,
10)
Residual Deterministic
Jitter at 2.5 Gbps
42” of 5 mil stripline FR4,
EQ1,0=F,1; K28.5 pattern,
DEMx=0, Tx Launch Amplitude
1.0 Vp-p, SD_TH=F. (Notes 2,
10)
Residual Deterministic
Jitter at 5 Gbps
7 meters of 24 AWG PCIe cable,
EQ1,0=1,0; K28.5 pattern,
DEMx=0, Tx Launch Amplitude
1.0 Vp-p, SD_TH=F. (Notes 2,
10)
Residual Deterministic
Jitter at 2.5 Gbps
7 meters of 24 AWG PCIe cable,
EQ1,0=1,0; K28.5 pattern,
DEMx=0, Tx Launch Amplitude
1.0 Vp-p, SD_TH=F. (Notes 2,
10)
Random Jitter
Tx Launch Amplitude 1.0 Vp-p,
SD_TH=F, Repeating 1100b
(D24.3) pattern. (Note 2)
Residual Deterministic 28” of 5 mil stripline FR4,
Jitter at 5 Gbps
EQ1,0=F,F; K28.5 pattern,
DEM1,0=F,1; Tx Launch
Amplitude 1.0 Vp-p, SD_TH=F.
(Notes 2, 10)
Residual Deterministic 28” of 5 mil microstrip FR4,
Jitter at 2.5 Gbps
EQ1,0=F,F; K28.5 pattern,
DEM1,0=F,0; Tx Launch
Amplitude 1.0 Vp-p, SD_TH=F.
(Notes 2, 10)
Residual Deterministic 7 meters of 24 AWG PCIe cable,
Jitter at 5 Gbps
EQ1,0=F,F; K28.5 pattern,
DEM1,0=F,1; Tx Launch
Amplitude 1.0 Vp-p, SD_TH=F.
(Notes 2, 10)
Residual Deterministic 7 meters of 24 AWG PCIe cable,
Jitter at 2.5 Gbps
EQ1,0=F,F; K28.5 pattern,
DEM1,0=F,0; Tx Launch
Amplitude 1.0 Vp-p, SD_TH=F.
(Notes 2, 10)
Typ
Max
Units
0.02
0.09
UI_P-P
0.02
0.04
UI_P-P
0.02
0.11
UI_P-P
0.03
0.07
UI_P-P
<0.5
psrms
0.02
0.09
UI_P-P
0.03
0.05
UI_P-P
0.03
0.13
UI_P-P
0.04
0.06
UI_P-P
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions. Absolute Maximum Numbers are guaranteed for a junction temperature range of -40°C to +125°C. Models
are validated to Maximum Operating Voltages only.
Note 2: Typical values represent most likely parametric norms at V_DD = 2.5V, T_A = 25°C., and at the Recommended Operation Conditions at the time of product
characterization and are not guaranteed.
Note 3: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 4: Allowed supply noise (mV_P-P sine wave) under typical conditions.
Note 5: Input Return Loss also uses the setup shown in Figure 6. The blocking / biasing circuit is replaced with a simple AC coupling capacitor for each input to
emulate a typical PCIe application.
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