COP688CL Datasheet, PDF (6/40 Pages) National Semiconductor (TI) – General Description

Absolute Maximum Ratings
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Supply Voltage (V_CC)
Voltage at Any Pin
Total Current into V_CC Pin (Source)
7V
b0 3V to V_CC a 0 3V
100 mA
Total Current out of GND Pin (Sink)
110 mA
Storage Temperature Range
b65 C to a140 C
Note Absolute maximum ratings indicate limits beyond
which damage to the device may occur DC and AC electri-
cal specifications are not ensured when operating the de-
vice at absolute maximum ratings
DC Electrical Characteristics COP88XCL b40 C ^s T_A ^s a85 C unless otherwise specified
Parameter
Conditions
Min
Typ
Max
Units
Operating Voltage
25
6
V
Power Supply Ripple (Note 1)
Peak-to-Peak
0 1 V_CC
V
Supply Current (Note 2)
CKI e 10 MHz
CKI e 4 MHz
V_CC e 6V t_c e 1 ms
V_CC e 4V t_c e 2 5 ms
12 5
mA
25
mA
HALT Current (Note 3)
V_CC e 6V CKI e 0 MHz
k₁
10
mA
IDLE Current
CKI e 10 MHz
V_CC e 6V t_c e 1 ms
35
mA
Input Levels
RESET
Logic High
Logic Low
CKI (External and Crystal Osc Modes)
Logic High
Logic Low
All Other Inputs
Logic High
Logic Low
0 8 V_CC
0 7 V_CC
0 7 V_CC
V
0 2 V_CC
V
V
0 2 V_CC
V
V
0 2 V_CC
V
Hi-Z Input Leakage
V_CC e 6V
b1
a1
mA
Input Pullup Current
V_CC e 6V V_IN e 0V
b40
b250
mA
G and L Port Input Hysteresis
0 35 V_CC
V
Output Current Levels
D Outputs
Source
Sink
All Others
Source (Weak Pull-Up Mode)
Source (Push-Pull Mode)
Sink (Push-Pull Mode)
V_CC e 4V V_OH e 3 3V
V_CC e 2 5V V_OH e 1 8V
V_CC e 4V V_OL e 1V
V_CC e 2 5V V_OL e 0 4V
V_CC e 4V V_OH e 2 7V
V_CC e 2 5V V_OH e 1 8V
V_CC e 4V V_OH e 3 3V
V_CC e 2 5V V_OH e 1 8V
V_CC e 4V V_OL e 0 4V
V_CC e 2 5V V_OL e 0 4V
b0 4
b0 2
10
20
b10
b2 5
b0 4
b0 2
16
07
mA
mA
mA
mA
b100
mA
b33
mA
mA
mA
mA
mA
TRI-STATE Leakage
V_CC e 6 0V
b2
a2
mA
Note 1 Rate of voltage change must be less then 0 5 V ms
Note 2 Supply current is measured after running 2000 cycles with a square wave CKI input CKO open inputs at rails and outputs open
Note 3 The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations Test conditions All inputs tied to V_CC L and G0–G5 configured as
outputs and set high The D port set to zero The clock monitor is disabled
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