COP688CL Datasheet, PDF (2/40 Pages) National Semiconductor (TI) – General Description

General Description (Continued)
It is a fully static part fabricated using double-metal silicon
gate microCMOS technology Features include an 8-bit
memory mapped architecture MICROWIRE PLUS serial
I O two 16-bit timer counters supporting three modes
(Processor Independent PWM generation External Event
counter and Input Capture mode capabilities) and two pow-
er savings modes (HALT and IDLE) both with a multi-
Connection Diagrams
Plastic Chip Carrier
sourced wakeup interrupt capability This multi-sourced in-
terrupt capability may also be used independent of the
HALT or IDLE modes Each I O pin has software selectable
configurations The device operates over a voltage range of
2 5V to 6V High throughput is achieved with an efficient
regular instruction set operating at a maximum of 1 ms per
instruction rate
Dual-In-Line Package
Top View
TL DD 9766–2
Order Number COP688CL-XXX V COP888CL-XXX V
COP988CL-XXX V or COP988CLH-XXX V
See NS Plastic Chip Package Number V44A
Dual-In-Line Package
Top View
TL DD 9766 – 4
Order Number COP688CL-XXX N COP888CL-XXX N
COP988CL-XXX N or COP988CLH-XXX N
See NS Molded Package Number N40A
Order Number COP688CL-XXX N COP884CL-XXX N
COP984CL-XXX N or COP984CLH-XXX N
See NS Molded Package Number N28B
Order Number COP684CL-XXX WM
COP884CL-XXX WM COP984CL-XXX WM
or COP984CLHXXX WM
See NS Surface Mount Package Number M28B
Top View
TL DD 9766–5
FIGURE 2 Connection Diagrams
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