COP688CL Datasheet, PDF (32/40 Pages) National Semiconductor (TI) – General Description

Opcode Table (Continued)
Upper Nibble Along X-Axis
Lower Nibble Along Y-Axis
7
6
5
4
3
2
1
0
IFBIT ANDSZ
LD B 0F
IFBNE 0
JSR
JMP
JP a17 INTR
0
0B
Ai
x000 – x0FF
x000 – x0FF
IFBIT
1B
LD B 0E
IFBNE 1
JSR
JMP
JP a18 JP a 2
1
x100 – x1FF
x100 – x1FF
IFBIT
2B
LD B 0D IFBNE 2
JSR
JMP
JP a19 JP a 3
2
x200 – x2FF
x200 – x2FF
IFBIT
3B
LD B 0C IFBNE 3
JSR
JMP
JP a20 JP a 4
3
x300 – x3FF
x300 – x3FF
IFBIT
4B
CLRA
LD B 0B
IFBNE 4
JSR
JMP
JP a21 JP a 5
4
x400 – x4FF
x400 – x4FF
IFBIT
SWAPA
LD B 0A
IFBNE 5
JSR
JMP
JP a22 JP a 6
5
5B
x500 – x5FF
x500 – x5FF
IFBIT DCORA LD B 09
IFBNE 6
JSR
JMP
JP a23 JP a 7
6
6B
x600 – x6FF
x600 – x6FF
IFBIT PUSHA
LD B 08
IFBNE 7
JSR
JMP
JP a24 JP a 8
7
7B
x700 – x7FF
x700 – x7FF
SBIT
0B
RBIT
0B
LD B 07
IFBNE 8
JSR
JMP
JP a25 JP a 9
8
x800 – x8FF
x800 – x8FF
SBIT
1B
RBIT
1B
LD B 06
IFBNE 9
JSR
x900 – x9FF
JMP
x900 – x9FF
JP a26
JP a 10
9
SBIT
2B
RBIT
2B
LD B 05
IFBNE 0A
JSR
JMP
JP a27
JP a 11
A
xA00 – xAFF
xA00 – xAFF
SBIT
3B
RBIT
3B
LD B 04
IFBNE 0B
JSR
JMP
JP a28
JP a 12
B
xB00 – xBFF
xB00 – xBFF
SBIT
4B
RBIT
4B
LD B 03
IFBNE 0C
JSR
JMP
JP a29
JP a 13
C
xC00 – xCFF
xC00 – xCFF
SBIT
5B
RBIT
5B
LD B 02
IFBNE 0D JSR
JMP
JP a30
JP a 14
D
xD00 – xDFF xD00 – xDFF
SBIT
6B
RBIT
6B
LD B 01
IFBNE 0E
JSR
JMP
JP a31
JP a 15
E
xE00 – xEFF
xE00 – xEFF
SBIT
7B
RBIT
7B
LD B 00
IFBNE 0F
JSR
JMP
JP a32
JP a 16
F
xF00 – xFFF
xF00 – xFFF
Where
i is the immediate data
Md is a directly addressed memory location
is an unused opcode
Note The opcode 60 Hex is also the opcode for IFBIT i A
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