PC87317VUL Datasheet, PDF (59/272 Pages) National Semiconductor (TI) – PC87317VUL/PC97317VUL SuperI/O Plug and Play Compatible with ACPI Compliant Controller/Extender

Real-Time Clock (RTC) and Advanced Power Control (APC) (Logical Device 2)
4.2.5 Date-of-Month Alarm Register (DMAR
This register contains the Day-of-Month alarm setting and
its “don’t care” enable bits. Upon first power-up it is located
at Bank 1, Index 49h and is initialized to C0h.
This register can be relocated anywhere in bank 0 or bank
1. Its location is programmed via the Section 4.5.16 "Day-
of-Month Alarm Address Register (DADDR)" on page 77.
Master Reset does not affect the Day-of-Month Alarm reg-
ister.
7 6 5 4 3 2 1 0 _{Date-of-Month Alarm}
1
1
0
0
0
0
0
0
Power-Up
Reset
Register
(DMAR)
Required
Relocatable Index
in Bank0 or Bank1
Day-of-Month
Alarm Bits
“Don’t Care” control bits
FIGURE 4-8. DMAR Register Bitmap
Bits 5-0 - Date-of-Month Alarm Bits
These read/write bits hold the Day-of-Month alarm value.
These six bits are set to the value of 0 upon first power-up,
and are unaffected by system resets. The legal values for
these six bits are, 00 to 31 in BCD format, and 00 to 1F in
binary format. Other values may cause unpredictable re-
sults. The BCD or Binary format is set by the DM bit, ex-
plained in Section 4.2.2 "RTC Control Register B (CRB)" on
page 57.
Bits 7,6 - “Don’t Care” Control Bits
The Day-of-Month Alarm is “Don’t Care” when bits 6 and 7
are set to 11.
4.2.6 Month Alarm Register (MAR)
This register contains the Month Alarm setting and its “don’t
care” enable bits.
Upon first power on, the Month Alarm register is located at
bank 1, Index 4Ah and is initialized to C0h. The default val-
ue is not guaranteed to any other location of the Month
Alarm Register.
This register can be relocated anywhere in bank 0 or bank
1. Its location is programmed via the MADDR Register, as
explained in Section 4.5.17 "Month Alarm Address Register
(MADDR)" on page 77.
Master Reset does not affect the Month Alarm register.
76543210
Month Alarm
1
1
0
0
0
0
0
0
Power-Up
Reset
Register
(MAR)
Required
Relocatable Index
in Bank0 or Bank1
Month
Alarm Bits
“Don’t Care” control bits
FIGURE 4-9. MAR Register Bitmap
Bits 5-0 - Day-of-Month Alarm Bits
These read/write bits hold the month alarm value. These six
bits are set to the value of 0 upon first power-up, and are un-
affected by system resets. The legal values for these six bits
are, 01 to 12 in BCD format, and 00 to 0C in binary format.
Other values may cause unpredictable results. The BCD or
Binary format is set by the DM bit of the CRB Register, as
explained in Section 4.2.2 "RTC Control Register B (CRB)"
on page 57.
Bits 7,6 - “Don’t Care” Control Bits
The Month Alarm is “Don’t Care” when bits 6 and 7 are set
to 11.
4.2.7 Century Register (CR)
This register holds the century.
Upon first power on, the Century Register resides in Bank
1, Index 48h and holds 00h.This register can be relocated
anywhere in bank 0 or bank 1. Its location is programmed
via the CADDR Register, as described in Section 4.5.18
"Century Address Register (CADDR)" on page 77.
Master Reset does not affect this register.
76543210
0
0
0
0
0
0
0
0
Power-Up
Reset
Required
Century
Register
(CR)
Relocatable Index
in Bank0 or Bank1
Century
Bits
FIGURE 4-10. MAR Register Bitmap
Bits 7 - 0
These read/write bits hold the century value.
4.3 APC OVERVIEW
Advanced Power Supply Control (APC) is implemented
within the RTC logical device. It enables the PC to power up
automatically in response to pre-programmed external
59
www.national.com