CS5535 Datasheet, PDF (52/555 Pages) National Semiconductor (TI) – Geode™ CS5535 I/O Companion Multi-Function South Bridge

Global Concepts and Features (Continued)
3.1.5 Topology
The connection of the GLIU to the seven GLDs of the
CS5535 is illustrated in Figure 3-3. Note the circled number
next to each GLD. This is the port number of the GLD. By
design convention, the GLIU is always port zero. Part of the
physical to device (P2D) descriptor is a port number. When
there is a hit on the descriptor address, the port number
indicates which GLD to route the packet to. If there is no
hit, then the packet is routed to the default port. For the
CS5535, the default is always Port 4, that is, the Diverse
Device (DD).
3.1.6 Address Spaces and MSRs
The GLIU and GLDs support the traditional memory and
I/O spaces. The memory space supports a traditional 32-
bit byte address with associated byte enables. The I/O
space is a 20-bit byte address with byte enables. I/O regis-
ters can be 8, 16, or 32 bits. The GLIU has both memory
and I/O P2Ds for routing.
In addition to the above spaces, there is a Model Specific
Register (MSR) space that is tied to the GeodeLink topol-
ogy. As introduced in the previous section, the GLIU has
eight ports with Port 0 assigned to the GLIU. An MSR
“address” is relative to the device making a request to it
and the topology between the requestor and the MSR.
Thus, for the GX2 processor to address an MSR in the
CS5535, it specifies a series of ports that must be tra-
versed to get there. Once a specific device port is identi-
fied, additional address bits are available to select a
specific MSR within a given device.
MSR space is functionally similar to PCI configuration
space. At boot time system initialization, the Core BIOS
(see Section 3.1 "GeodeLink Architecture Overview" on
page 50) traverses the topology of the system to determine
what is present. By convention, the first MSR at each port
is an ID register that indicates a specific device. Once the
Core BIOS knows what is present, it assigns devices to
specific locations in the appropriate memory or I/O address
space using MSRs. Generally, MSRs are used to configure
and set up GLDs, but are not used for ongoing operations.
The “assignment” MSRs are located in the GLIUs as
“descriptors”. The “assignment descriptor” basically says:
“route a request packet containing address X to port Y”.
Port Y can be the final device or another GLIU. This second
GLIU must have assignments to route address X to port Z.
This process continues until the final device port is speci-
fied.
GLPCI_SB
USBC2
ATAC
DD
Req In
Data In
Req Out
Data Out
Diag
Req In
Data In
Req Out
Data Out
Diag
Req In
Data In
Req Out
Data Out
Diag
Port 1
Port 2
Port 7
GLIU
Port 0
Port 3
Port 6
Port 4
Port 5
Req In
Data In
Req Out
Data Out
Diag
Req In
Data In
Req Out
Data Out
Diag
Req In
Data In
Req Out
Data Out
Diag
GLCP
USBC1
ACC
Figure 3-3. CS5535 GeodeLink Architecture Topology
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