CS5535 Datasheet, PDF (226/555 Pages) National Semiconductor (TI) – Geode™ CS5535 I/O Companion Multi-Function South Bridge

GLPCI_SB Register Descriptions (Continued)
5.2.3.2 PCI Configuration Space Header Byte 4-7 (GLPCI_PCI_HEAD_BYTE4-7)
PCI Index
04h
Type
RO
Reset Value
00000000h
GLPCI_PCI_HEAD_BYTE4-7 Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PCI_STS
PCI_CMD
Bit
31:16
15:0
Name
PCI_STS
PCI_CMD
GLPCI_PCI_HEAD_BYTE4-7 Bit Descriptions
Description
PCI Status Register (Read Only). Not implemented.
PCI Command Register (Read Only). Not implemented.
5.2.3.3 PCI Configuration Space Header Byte 8-B (GLPCI_PCI_HEAD_BYTE8-B)
PCI Index
08h
Type
RO
Reset Value
FF0000xxh
GLPCI_PCI_HEAD_BYTE8-B Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PCI_CLASS
DEV_REV_ID
Bit
31:16
15:0
Name
PCI_CLASS
DEV_REV_ID
GLPCI_PCI_HEAD_BYTE8-B Bit Descriptions
Description
PCI Class Code (Read Only).
Device Revision ID (Read Only). Identifies the major and minor silicon revision of the
CS5535. Can also be read at MSR 51700017h[7:0]. See Section 5.20.2.13 "Chip Revi-
sion ID (GLCP_CHIP_REV_ID)" on page 524.
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