CS5535 Datasheet, PDF (410/555 Pages) National Semiconductor (TI) – Geode™ CS5535 I/O Companion Multi-Function South Bridge

DMA Register Descriptions (Continued)
Bit Name
7:4 Reserved
3
CH3_MASK
2
CH2_MASK
1
CH1_MASK
0
CH0_MASK
DMA_CH3:0_WR_MSK Bit Descriptions
Description
Reserved. Write value is don’t care.
Channel 3 Mask Value. 0: Not masked; 1: Masked.
Channel 2 Mask Value. 0: Not masked; 1: Masked.
Channel 1 Mask Value. 0: Not masked; 1: Masked.
Channel 0 Mask Value. 0: Not masked; 1: Masked.
5.13.2.11 Master DMA Channel [7:4] Memory Address (DMA_CH[x]_ADDR_BYTE)
Master DMA Channel 4 Memory Address
(DMA_CH4_ADDR_BYTE)
I/O Address
0C0h
Type
R/W
Reset Value
xxh
Master DMA Channel 6 Memory Address
(DMA_CH6_ADDR_BYTE)
I/O Address
0C8h
Type
R/W
Reset Value
xxh
Master DMA Channel 5 Memory Address
(DMA_CH5_ADDR_BYTE)
I/O Address
0C4h
Type
R/W
Reset Value
xxh
Master DMA Channel 7 Memory Address
(DMA_CH7_ADDR_BYTE)
I/O Address
0CCh
Type
R/W
Reset Value
xxh
DMA_CH[x]_ADDR_BYTE Register Map
7
6
5
4
3
2
1
0
DMA_CH_ADDR_BYTE
DMA_CH[x]_ADDR_BYTE Bit Descriptions
Bit Name
Description
7:0 DMA_CH_ADDR_BYTE DMA Channel Address. Read/write in two successive bus cycles, low byte first.
5.13.2.12 Master DMA Channel [7:4] Transfer Count (DMA_CH[x]_CNT_BYTE)
Master DMA Channel 4 Transfer Count
(DMA_CH4_CNT_BYTE)
I/O Address
0C2h
Type
R/W
Reset Value
xxh
Master DMA Channel 6 Transfer Count
(DMA_CH6_CNT_BYTE)
I/O Address
0CAh
Type
R/W
Reset Value
xxh
Master DMA Channel 5 Transfer Count
(DMA_CH5_CNT_BYTE)
I/O Address
0C6h
Type
R/W
Reset Value
xxh
Master DMA Channel 7 Transfer Count
(DMA_CH7_CNT_BYTE)
I/O Address
0CEh
Type
R/W
Reset Value
xxh
DMA_CH[x]_CNT_BYTE Register Map
7
6
5
4
3
2
1
0
DMA_CH_CNT_BYTE
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