CS5535 Datasheet, PDF (474/555 Pages) National Semiconductor (TI) – Geode™ CS5535 I/O Companion Multi-Function South Bridge

MFGPT Register Descriptions (Continued)
5.17.2.3 MFGPT[x] Up Counter (MFGPT[x]_CNT)
MFGPT0 to MFGPT5 Up Counter registers are in the Working power domain while MFGPT6 and MFGPT7 Up Counter reg-
isters are in the Standby power domain.
MFGPT0 Up Counter (MFGPT0_CNT)
MFGPT I/O Offset 04h
Type
R/W
Reset Value
0000h
MFGPT4 Up Counter (MFGPT4_CNT)
MFGPT I/O Offset 24h
Type
R/W
Reset Value
0000h
MFGPT1 Up Counter (MFGPT1_CNT)
MFGPT I/O Offset 0Ch
Type
R/W
Reset Value
0000h
MFGPT5 Up Counter (MFGPT5_CNT)
MFGPT I/O Offset 2Ch
Type
R/W
Reset Value
0000h
MFGPT2 Up Counter (MFGPT2_CNT)
MFGPT I/O Offset 14h
Type
R/W
Reset Value
0000h
MFGPT6 Up Counter (MFGPT6_CNT)
MFGPT I/O Offset 34h
Type
R/W
Reset Value
0000h
MFGPT3 Up Counter (MFGPT3_CNT)
MFGPT I/O Offset 1Ch
Type
R/W
Reset Value
0000h
MFGPT7 Up Counter (MFGPT7_CNT)
MFGPT I/O Offset 3Ch
Type
R/W
Reset Value
0000h
MFGPT[x]_CNT Register Map
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
MFGPT_CNT
Bit Name
15:0 MFGPT_CNT
MFGPT[x]_CNT Bit Descriptions
Description
Up Counter Value. This register contains the current value of the counter of
MFGPT[x}. Hardware guarantees that reading or writing may be performed at any
time without experiencing aliasing or ‘intermediate-value’ problems.
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