CS5535 Datasheet, PDF (453/555 Pages) National Semiconductor (TI) – Geode™ CS5535 I/O Companion Multi-Function South Bridge

GPIO Subsystem Register Descriptions (Continued)
GPIO High Bank Lock Enable (GPIOH_LOCK_EN)
GPIO I/O Offset BCh
Type
R/W
Reset Value
00000000h
GPIOH_LOCK_EN Register Map
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD
Bit
31:15
15
Name
RSVD
LKNE
14 LKPE
13 LKIP
12 LKIA
11 LKEE
10 LKFE
9
LKII
8
LKIE
7
LKPD
6
LKPU
5
LKA2
4
LKA1
3
LKOI
2
LKOD
1
LKOE
0
LKOV
GPIOH_LOCK_EN Bit Descriptions
Description
Reserved. Write to 0.
Lock GPIOH_IN_NEGEDGE_ENA. When set, writing to the GPIO Low Bank Input
Negative Edge Enable register (GPIO I/O Offset C4h) is prevented.
Lock GPIOH_IN_POSEDGE_EN. When set, writing to the GPIO Low Bank Input Posi-
tive Edge Enable register (GPIO I/O Offset C0h) is prevented.
Lock GPIOH_EVENTS_EN. When set, writing to the GPIO Low Bank Events Enable
(interrupts &PMEs) register (GPIO I/O Offset B8h) is prevented.
Lock GPIOH_IN_AUX1_SEL. When set, writing to the GPIO Low Bank Input Auxiliary
1 Select register (GPIO I/O Offset B4h) is prevented.
Lock GPIOH_IN_EVNTCNT_EN. When set, writing to the GPIO Low Bank Input Event
Count Enable register (GPIO I/O Offset ACh) is prevented.
Lock GPIOH_IN_FLTR_EN. When set, writing to the GPIO Low Bank Input Filter
Enable register (GPIO I/O Offset A8h) is prevented.
Lock GPIOH_IN_INVRT_EN. When set, writing to the GPIO Low Bank Input Invert
Enable register (GPIO I/O Offset A4h) is prevented.
Lock GPIOH_IN_EN. When set, writing to the GPIO Low Bank Input Enable register
(GPIO I/O Offset A0h) is prevented.
Lock GPIOH_PD_EN. When set, writing to the GPIO Low Bank Pull-Down Enable reg-
ister (GPIO I/O Offset 9Ch) is prevented.
Lock GPIOH_PU_EN. When set, writing to the GPIO Low Bank Pull-Up Enable regis-
ter (GPIO I/O Offset 98h) is prevented.
Lock GPIOH_OUT_AUX2_SEL. When set, writing to the GPIO Low Bank Output Aux-
iliary 2 Select register (GPIO I/O Offset 94h) is prevented.
Lock GPIOH_OUT_AUX1_SEL. When set, writing to the GPIO Low Bank Output Aux-
iliary 1 Select register (GPIO I/O Offset 90h) is prevented.
Lock GPIOH_OUT_INVRT_EN. When set, writing to the GPIO Low Bank Output Invert
Enable register (GPIO I/O Offset 8Ch) is prevented.
Lock GPIOH_OUT_OD_EN. When set, writing to the GPIO Low Bank Output Open-
Drain Enable register (GPIO I/O Offset 88h) is prevented.
Lock GPIOH_OUTPUT_ENABLE. When set, writing to the GPIO Low Bank Enable
register (GPIO I/O Offset 84h) is prevented.
Lock GPIOH_OUTPUT_VALUE. When set, writing to the GPIO Low Bank Output
Value register (GPIO I/O Offset 80h) is prevented.
Revision 0.8
453
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