CS5535 Datasheet, PDF (418/555 Pages) National Semiconductor (TI) – Geode™ CS5535 I/O Companion Multi-Function South Bridge

5.14 LOW PIN COUNT REGISTER DESCRIPTIONS
The registers for the Low Pin Count (LPC) port are divided
into two sets:
• Standard GeodeLink Device MSRs (Shared with DIVIL,
see Section 5.6.1 on page 299.)
• LPC Specific MSRs
The MSRs are accessed via the RDMSR and WRMSR pro-
cessor instructions. The MSR address is derived from the
perspective of the CPU Core. See Section 3.2 "CS5535
MSR Addressing" on page 53 for more details on MSR
addressing.
All MSRs are 64 bits, however, the LPC Specific MSRs are
called out as 32 bits. The LPC module treats writes to the
upper 32 bits (i.e., bits [63:32]) of the 64-bit MSRs as don’t
cares and always returns 0 on these bits.
The LPC Specific MSRs are summarized in Table 5-54.
The reference column in the summary table points to the
page where the register maps and bit descriptions are
listed.
MSR Address
5140004Ch
5140004Dh
5140004Eh
5140004Fh
Type
RO
RO
R/W
R/W
Table 5-54. LPC Specific MSRs Summary
Register Name
Reset Value
LPC Address Error (LPC_EADDR)
LPC Error Status (LPC_ESTAT)
LPC Serial IRQ Control (LPC_SIRQ)
LPC Reserved (LPC_RSVD)
00000000h
00000000h
00000000h
00000000h
Reference
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