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LMH2190 Datasheet, PDF (5/24 Pages) National Semiconductor (TI) – Quad Channel 27 MHz Clock Tree Driver with I2C Interface
Symbol
Parameter
PSRR
Power Supply Rejection Ratio
EN
Output Noise Voltage
TSHTDWN Thermal Shutdown
ΔVOUT
Line Transient (Note 7)
ROUT
TON
Load Transient (Note 7)
Overshoot on Startup (Note 7)
DC Output Resistance
Turn on Time (Note 7)
Condition
VBAT ripple = 200 mVPP, f = 100 Hz
IOUT = 10 mA
f = 217.5 Hz
f = 1 kHz
f = 10 kHz
f = 50 kHz
f = 100 kHz
f = 1 MHz
f = 3.25 MHz
BW = 10Hz to 100 kHz, VBAT = 4.2V,
COUT = 2.2 µF, All Outputs are Off
Temperature
Hysteresis
VBAT = (VOUT (NOM) + 1.0V) to (VOUT
(NOM) + 1.6V) in 30 µs
VBAT = (VOUT (NOM) + 1.6V) to (VOUT
(NOM) + 1.0V) in 30 µs
IOUT = 0 mA to 10 mA in 10 µs
IOUT = 10 mA to 0 mA in 10 µs
Min
(Note 6)
-1
-70
to 95% of VOUT (NOM)
Typ
(Note 5)
93
90
78
62
54
50
42
35
10
160
20
5
185
Max
(Note 6)
1
30
100
270
Units
dB
µVRMS
°C
mV
mV
mV
Ω
µs
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Tables.
Note 2: Human body model, applicable std. MIL-STD-883, Method 3015.7. Machine model, applicable std. JESD22–A115–A (ESD MM std of JEDEC). Field-
Induced Charge-Device Model, applicable std. JESD22–C101–C. (ESD FICDM std. of JEDEC)
Note 3: The maximum power dissipation is a function of TJ(MAX) , θJA and TA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC board.
Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where
TJ > TA.
Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 6: Limits are 100% production tested at 25°C. Limits over temperature range are guaranteed through correlations using statistical quality control (SQC)
method.
Note 7: This parameter is guaranteed by design and/or characterization and is not tested in production.
Note 8: IDD current depends on switching frequency and load.
Note 9: VDD_IO is equal to VOUT when the LDO is enabled and it is equal to VENABLE when it is disabled.
Note 10: I2C interface uses IO cells guaranteed for 1.8V typical supply (1.6V Min - 2.0V Max).
Note 11: CBAT, COUT: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
Note 12: The device maintains stable, regulated output voltage without a load.
Note 13: Appropriate output load register must be set.
Note 14: Dropout voltage is the voltage difference between the supply voltage and the output voltage at which the output voltage drops to 100 mV below its
nominal value.
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