LMH2190 Datasheet, PDF (18/24 Pages) National Semiconductor (TI) – Quad Channel 27 MHz Clock Tree Driver with I2C Interface

I²C Registers
TABLE 2. Configuration Register
Address = 00H, type = R/W, reset value = 44H, 0100_0100, Bold face settings are the default configuration.
Field
Bits Description
Output Mode
[0] Sets the timing relationship of the clock outputs (Figure 7).
0 - All 4 outputs are skewed from each other
1 - Two pair of outputs where one output of the pair is the inversion of the other and the
second pair is skewed from the first pair.
Clock Request Output Type
[1] Sets whether the output is push-pull or open drain.
0 - Push-Pull Output
1 - Open Drain/Source Output (Open drain with Active low output, Open source with
Active high output).
Clock Request Output Polarity
[2] Sets whether the clock request output is active low or active high.
0 - Active low output
1 - Active high output
Clock Request Output Mode
[3] Sets how the clock request output operates.
0 - Use clock request inputs
1 - Force the clock request output to be asserted.
Clock Input Type
[4] Sets whether the input is AC or DC coupled.
0 - AC coupled
1 - DC coupled
LDO Mode
[6-5]
Sets the regulator mode of operation.
00 - OFF
01 - Reserved
10 - Track Clock Requests
11 - Force ON
Reserved
[7]
TABLE 3. CLK1 Output Register
Address = 01H, type = R/W, reset value = 06H, 0000_0110, Bold face settings are the default configuration.
Field
Bits Description
CLK1 Load
[1-0]
Sets the drive strength of the clock output based on the capacitive load.
00 - 10pF to 15pF
01 - 15pF to 22.5pF
10 - 22.5pF to 33.5pF
11 - 33.5pF to 50pF
CLK_REQ1 Input Polarity
[2] Sets whether a logic low or high enables the clock output.
0 - Logic low enables the clock output.
1 - Logic high enables the clock output.
CLK_REQ1 Force ON Control
[3] Selects whether to use a clock request or I²C logic to enable the output.
0 - Use the clock request pin to control the output.
1 - Force the clock output to be enabled (Force ON).
CLK_REQ1 Force OFF Control
[4] Selects whether to use a clock request or I²C logic to disable the output.
0 - Use the clock request pin to control the output.
1 - Force the clock output to be disabled (Force OFF). ”Force OFF" overrides ”Force
ON".
CLK_REQ1 Pull down Resistor
[5] Selects whether an internal 200 kΩ pull down resistor on the clock request input to GND
is present.
0 - No internal pull down resistor is present.
1 - Internal 200 kΩ pull-down resistor is present.
Reserved
[6]
Reserved
[7]
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