LMH2190 Datasheet, PDF (21/24 Pages) National Semiconductor (TI) – Quad Channel 27 MHz Clock Tree Driver with I2C Interface

LAYOUT RECOMMENDATIONS
As with any other device, careful attention must be paid to the
board layout. If the board isn't properly designed, the perfor-
mance of the device can be less than might be expected.
Especially the input clock trace (SCLK_IN) and output traces
(CLK1/2/3/4) should be as short as possible to reduce the
capacitive load observed by the clock outputs. Also proper
decoupling close to the device is necessary. Beside a capac-
itor in the µF range (See Table 8), a capacitor of 100 nF on
V_BAT and V_OUT is recommended close to device. The equiv-
alent series resistance (ESR) of the capacitors should be
sufficiently low. A standard capacitor is usually adequate. Ad-
vised values are given in Table 8. An evaluation board is
available to ease evaluation and demonstrate a proper board
layout.
TABLE 8. Recommended Component Values
Symbol
C_BAT
C_OUT
ESR
Parameter
Capacitor on V_BAT
Capacitor on V_OUT
Equivalent Series Resistance
Min
Typ
0.47
1
1
2.2
5
C_{SCLK_IN}
Input AC Coupling Capacitor
330
470
C_BAT, C_OUT: Low-ESR Surface-Mount Ceramic Capacitors (MLCC's) used in setting electrical characteristics.
Max
500
10000
Units
µF
mΩ
pF
21
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