English
Language : 

LP3971 Datasheet, PDF (39/42 Pages) National Semiconductor (TI) – POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS
Application Hints
LDO CONSIDERATIONS
External Capacitors
The LP3971’s regulators require external capacitors for
regulator stability. These are specifically designed for por-
table applications requiring minimum board space and small-
est components. These capacitors must be correctly se-
lected for good performance.
Input Capacitor
An input capacitor is required for stability. It is recommended
that a 1.0 µF capacitor be connected between the LDO input
pin and ground (this capacitance value may be increased
without limit).
This capacitor must be located a distance of not more than 1
cm from the input pin and returned to a clean analogue
ground. Any good quality ceramic, tantalum, or film capacitor
may be used at the input.
Important: Tantalum capacitors can suffer catastrophic fail-
ures due to surge current when connected to a low imped-
ance source of power (like a battery or a very large capaci-
tor). If a tantalum capacitor is used at the input, it must be
guaranteed by the manufacturer to have a surge current
rating sufficient for the application.
There are no requirements for the ESR (Equivalent Series
Resistance) on the input capacitor, but tolerance and tem-
perature coefficient must be considered when selecting the
capacitor to ensure the capacitance will remain approxi-
mately 1.0 µF over the entire operating temperature range.
Output Capacitor
The LDO’s are designed specifically to work with very small
ceramic output capacitors. A 1.0 µF ceramic capacitor (tem-
perature types Z5U, Y5V or X7R) with ESR between 5 mΩ to
500 mΩ, are suitable in the application circuit.
For this device the output capacitor should be connected
between the VOUT pin and ground.
It is also possible to use tantalum or film capacitors at the
device output, COUT (or VOUT), but these are not as attrac-
tive for reasons of size and cost (see the section Capacitor
Characteristics).
The output capacitor must meet the requirement for the
minimum value of capacitance and also have an ESR value
that is within the range 5 mΩ to 500 mΩ for stability.
No-Load Stability
The LDO’s will remain stable and in regulation with no ex-
ternal load. This is an important consideration in some cir-
cuits, for example CMOS RAM keep-alive applications.
Capacitor Characteristics
The LDO’s are designed to work with ceramic capacitors on
the output to take advantage of the benefits they offer. For
capacitance values in the range of 0.47 µF to 4.7 µF, ceramic
capacitors are the smallest, least expensive and have the
lowest ESR values, thus making them best for eliminating
high frequency noise. The ESR of a typical 1.0 µF ceramic
capacitor is in the range of 20 mΩ to 40 mΩ, which easily
meets the ESR requirement for stability for the LDO’s.
For both input and output capacitors, careful interpretation of
the capacitor specification is required to ensure correct de-
vice operation. The capacitor value can change greatly, de-
pending on the operating conditions and capacitor type.
In particular, the output capacitor selection should take ac-
count of all the capacitor parameters, to ensure that the
specification is met within the application. The capacitance
can vary with DC bias conditions as well as temperature and
frequency of operation. Capacitor values will also show
some decrease over time due to aging. The capacitor pa-
rameters are also dependant on the particular case size,
with smaller sizes giving poorer performance figures in gen-
eral. As an example, Figure 6 shows a typical graph com-
paring different capacitor case sizes in a Capacitance vs. DC
Bias plot. As shown in the graph, increasing the DC Bias
condition can result in the capacitance value falling below
the minimum value given in the recommended capacitor
specifications table. Note that the graph shows the capaci-
tance out of spec for the 0402 case size capacitor at higher
bias voltages. It is therefore recommended that the capacitor
manufacturers’ specifications for the nominal value capacitor
are consulted for all conditions, as some capacitor sizes
(e.g. 0402) may not be suitable in the actual application.
20180723
FIGURE 6. Graph Showing a Typical Variation in
Capacitance vs. DC Bias
The ceramic capacitor’s capacitance can vary with tempera-
ture. The capacitor type X7R, which operates over a tem-
perature range of −55˚C to +125˚C, will only vary the capaci-
tance to within ±15%. The capacitor type X5R has a similar
tolerance over a reduced temperature range of −55˚C to
+85˚C. Many large value ceramic capacitors, larger than
1 µF are manufactured with Z5U or Y5V temperature char-
acteristics. Their capacitance can drop by more than 50% as
the temperature varies from 25˚C to 85˚C. Therefore X7R is
recommended over Z5U and Y5V in applications where the
ambient temperature will change significantly above or be-
low 25˚C.
Tantalum capacitors are less desirable than ceramic for use
as output capacitors because they are more expensive when
comparing equivalent capacitance and voltage ratings in the
0.47 µF to 4.7 µF range.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum
capacitor with an ESR value within the stable range, it would
39
www.national.com