LP3971 Datasheet, PDF (37/42 Pages) National Semiconductor (TI) – POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS

Application Note (Continued)
Typical Application Diagram with PXA27x Advanced Applications Processor Version “B”
LP3971 & PXA27x START-UP
Initial Cold Start Power On Sequence
1. The Back up battery is connected to the PMU, power is
applied to the back-up battery pin, the RTC_LDO turns
on and supplies a stable output voltage to the
VCC_BATT pin of the Applications processor (initiating
the power-on reset event) with nRSTO asserted from the
LP3971 to the processor.
2. The Applications processor waits for the de-assertion of
nBATT_FLT to indicate system power (V_IN) is available.
3. IF system power (V_bat) is avaliable, the LP3971 de-
asserts nBATT_FLT.
4. nRSTO de-asserts after a minimum of 50 mS.
5. The Applications processor asserts SYS_EN, the
LP3971 enables the system high-voltage power sup-
plies. The Applications processor starts its countdown
20180721
timer set to 125 mS.
6. The LP3971 enables the high-voltage power supplies.
-LDO1 power for VCC_MVT, BG, OSC13M and PLL
enabled first, followed by others if delay is on.
7. Countdown timer expires; the Applications processor
asserts PWR_EN (ext. pin or I²C) to enable the low-
voltage power supplies. The processor starts the count-
down timer set to 125 mS period.
8. The Applications processor asserts PWR_EN (ext. pin or
I²C), the LP3971 enables the low-voltage regulators.
9. Countdown timer expires; If enabled power domains are
OK (I²C read) the power up sequence continues by
enabling the processors 13 MHz oscillator and PLL’s.
10. The Applications processor begins the execution of
code.
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