LP3971 Datasheet, PDF (27/42 Pages) National Semiconductor (TI) – POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS

I ²C Register Definitions (Continued)
BUCK 2 TARGET VOLTAGE 2 REGISTER (B2TV2) 8h’2A
Bit
7
6
5
4
Designation
Reserved
Reset Value
0
0
0
1
3
2
1
Buck 2 Output Voltage (B2OV)
1
0
0
BUCK 2 TARGET VOLTAGE 2 REGISTER (B2TV2) 8h’2A DEFINITIONS
Bit Access
7:5
...
4:0
R/W
Name
...
B2OV
Reserved
Output Voltage
Data Code
5h’01
5h’02
5h’03
5h’04
5h’05
5h’06
5h’07
5h’08
5h’09
5h’0A
5h’0B
5h’0C
Description
(V)
Data Code
0.80
5h’0D
0.85
5h’0E
0.90
5h’0F
0.95
5h’11
1.00
5h’12
1.05
5h’13
1.10
5h’14
1.15
5h’15
1.20
5h’16
1.25
5h’17
1.30
5h’18
1.35
5h’19
BUCK 2 VOLTAGE RAMP CONTROL REGISTER (B2RC) 8h’2B
Bit
7
6
5
4
3
2
1
Designation
Reserved
Ramp Rate
Reset Value
0
0
0
0
1
0
1
BUCK 2 VOLTAGE RAMP CONTROL REGISTER (B2RC) 8h’2B DEFINITIONS
Bit Access
7:5
...
4:0
R/W
Name
...
B2RS
Reserved
DVM Ramp Speed
Data Code
4h’0
4h’1
4h’2
4h’3
4h’4
4h’5
4h’6
4h’7
4h’8
4h’9
4h’A
Description
Ramp Rate
(mV/µs)
Instant
1
2
3
4
5
6
7
8
9
10
0
0
(V)
1.40
1.45
1.50
1.60
1.65
1.70
1.80
1.90
2.50
2.80
3.00
3.30
0
0
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