PC87366 Datasheet, PDF (35/240 Pages) National Semiconductor (TI) – 128-Pin LPC SuperI/O with System Hardware Monitoring, MIDI and Game Ports

2.0 Device Architecture and Configuration (Continued)
GPIO30-34
GPIO20-27
GPIO10-14,16,17
GPO15
GPIO00-07
WDO
FANIN0-2
FANOUT0-2
SLCT
PE
BUSY_WAIT
ACK
SLIN_ASTRB
INIT
PD0-7
ERR
AFD_DSTRB
STB_WRITE
RDATA
WDATA
WGATE
HDSEL
DIR
STEP
TRK0
INDEX
DSKCHG
WP
MTR1,0
DR1,0
DENSEL
DRATE0
LED1,2
GPIE6,7
GPIOE0-5
GPIS2
GPOS0,1
PSON
PWBTIN
PWBTOUT
PWUREQ
RING
SLPS5
SLPS3
BADDR
PSLDC0,1
TEST
PSONPOL
JOYAX
JOYAY
JOYABTN0
JOYABTN1
JOYBX
JOYBY
JOYBBTN0
JOYBBTN1
GPIO
Ports
WATCHDOG
Timer
Fan Speed
Control &
Monitor
Parallel
Port
FDC
System
Wake-Up
Control
Serial
Port 1
Serial
Port 2
with IR
Keyboard
&
Mouse
Controller
ACCESS.
bus
Bus
Interface
Protection
SIN1
SOUT1
RTS1
DTR1/BOUT1
CTS1
DSR1
DCD1
RI1
SIN2
SOUT2
RTS2
DTR2/BOUT2
CTS2
DSR2
DCD2
RI2
IRRX1,IRRX2
IRTX
IRSL0-2
IRSL3
P12,P16,P17
GA20
KBCLK
KBDAT
KBRST
MDAT
MCLK
SCL
SDA
CLKIN
LRESET
LCLK
SERIRQ
LDRQ
LFRAME
LAD3-0
SMI
PIRQ3-7,9-12,14-15
CHASI
CHASO
Strap
Config
System
Hardware
Monitoring
ALARM
AVI0-6
D1N,D2N
D1P,D2P
TS1-3
OTS1,2
VREF
Game
MIDI
Interface
Config
& Control
Registers
MDTX
MDRX
Figure 1. PC87366 Detailed Block Diagram
35
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