PC87366 Datasheet, PDF (21/240 Pages) National Semiconductor (TI) – 128-Pin LPC SuperI/O with System Hardware Monitoring, MIDI and Game Ports

1.0 Signal/Pin Connection and Description (Continued)
Signal
SIN2
SLCT
SLIN_ASTRB
SLPS3,5
SMI
SOUT1
SOUT2
STEP
STB_WRITE
TEST
TRK0
TS1-3
V_BAT
V_DD
V_REF
V_SB
V_SS
WAIT
WDATA
WDO
WGATE
WP
WRITE
Pin(s)
Functional Group
Name
Section
DC Characteristics
Buffer Type
Section
105
Serial Port 2
1.4.14
IN_TS
14.2.6
76
Parallel Port
1.4.11 IN_T
14.2.5
87
Parallel Port
1.4.11
OD₁₄, O_14/14
14.2.9, 14.2.8
36,37
System Wake-Up 1.4.17 IN_TS
14.2.6
21
Bus Interface
1.4.2
99
Serial Port 1
1.4.14
107
Serial Port 2
1.4.14
67
FDC
1.4.5
94
Parallel Port
1.4.11
98
Strap Configuration 1.4.15
64
FDC
1.4.5
47-49
VLM
1.4.16
30
Power and Ground 1.4.12
20, 52, 83, 115 Power and Ground 1.4.12
46
Hardware Monitoring 1.4.16
31
Power and Ground 1.4.12
19, 51, 84, 116 Power and Ground 1.4.12
See BUSY_WAIT
66
FDC
1.4.5
56
WATCHDOG
1.4.18
65
FDC
1.4.5
63
FDC
1.4.5
See STB_WRITE
OD₁₂
O_3/6
O_3/6
OD₁₂, O_2/12
OD₁₄, O_14/14
IN_STRP
IN_T
IN_AN1
IN_ULR
PWR
IN_AN2, O_AN1
PWR
GND
OD₁₂, O_2/12
OD₆, O_3/6
OD₁₂, O_2/12
IN_T
14.2.9
14.2.8
14.2.8
14.2.9, 14.2.8
14.2.9, 14.2.8
14.2.4
14.2.5
14.2.10
N/A
N/A
14.2.11, 14.2.13
N/A
N/A
14.2.9, 14.2.8
14.2.9, 14.2.8
14.2.9, 14.2.8
14.2.5
MUX
MM
MUX
(SLPS3)
MUX
MUX
MUX
MM
MUX
MUX
MUX
21
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