PC87366 Datasheet, PDF (31/240 Pages) National Semiconductor (TI) – 128-Pin LPC SuperI/O with System Hardware Monitoring, MIDI and Game Ports

1.0 Signal/Pin Connection and Description (Continued)
1.4.17 System Wake-Up Control
Signal Pin/s I/O Buffer Type Power Well
Description
LED1
LED2
25
26
O
O_12/12
GPIE6-7 58-59
GPIOE0-5 23-28
GPIS2
35
GPOS0-1 33-34
I
IN_TS
I/O
IN_TS/
OD₆, O_3/6
I
IN_TS
O OD₆, O_3/6
PSON
34
O O₄, OD₁₂
PWBTIN 35
PWBTOUT 33
PWUREQ 32
I
IN_TS
O
OD₁₂
O
OD₆
RING
27
I
IN_TS
SLPS3
36
SLPS5
37
I
IN_TS
I
IN_TS
LED. V_SB-powered pins with programmable outputs, each of
V_{SB which can be used to produce a 0, 0.25, 0.5, 1, 4 Hz waveform for}
LED control.
V_SB General-Purpose Input Event
V_SB General-Purpose I/O Event. V_SB-powered pins.
V_SB General-Purpose Input Standby. V_SB-powered pin.
V_SB General-Purpose Output Standby. V_SB-powered pins.
Power Supply On. Active level (low or high via PSONPOL strap)
V_SB
instructs the main power supply to turn the power on. PSON
output signal is open-drain when active low and push-pull when
active high
Power Button In. Active (low) level indicates a user request to
V_SB turn the power on or off. This pin has an internal Schmidt-trigger
input buffer and debouce protection of at least 16 mS.
V_SB
Power Button Out. Active (low) level serves as output to the
chipset power button input.
Power-Up Request. Active (low) level indicates that wake-up
V_SB
event has occurred, and causes the chipset to turn the power
supply on, or to exit its current sleep state. The open-drain output
must be pulled up to V_SB in order to function during power-off.
Telephone Line Ring. Detection of a pulse train on the RING pin
V_SB
is a wake-up event that can activate the power-up request
(PWUREQ). The pin has a Schmidt-trigger input buffer, powered
by V_SB.
Sleep State 3, 4 or 5. Input from this pin is assumed to be driven
V_SB by the system’s ACPI controller to indicate the system’s power
state.
Sleep State 4 or 5. Input from this pin is assumed to be driven
V_SB by the system’s ACPI controller to indicate the system’s power
state.
1.4.18 WATCHDOG Timer (WDT)
Signal
WDO
Pin/s I/O Buffer Type Power Well
Description
WATCHDOG Out. Low level indicates that the WATCHDOG Timer
56
O OD₆, O_3/6
V_DD has reached its time-out period without being retriggered.
The output type and an optional pull-up are configurable.
31
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