English
Language : 

DS92LV2421_11 Datasheet, PDF (13/40 Pages) National Semiconductor (TI) – 10 to 75 MHz, 24-bit Channel Link II Serializer and Deserializer
Deserializer Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Pin/Freq.
tRCP
CLK Output Period
tRDC
CLK Output Duty Cycle
tRCP = tTCP
SSCG = OFF,
10 – 75 MHz
CLKOUT
SSCG = ON,
10 – 20MHz
SSCG = ON,
10 – 65MHz
tCLH
LVCMOS
Low-to-High
Transition Time, Figure 10
VDDIO = 1.8V,
CL = 4pF, OS_CLKOUT/
DATA = L
CLKOUT
VDDIO = 3.3V
CL = 4pF, OS_CLKOUT/
DATA = H
tCHL
LVCMOS
High-to-Low
Transition Time, Figure 10
VDDIO = 1.8V,
CL = 4pF, OS_CLKOUT/
DATA = L
CLKOUT
VDDIO = 3.3V
CL = 4pF, OS_CLKOUT/
DATA = H
tROS
tROH
tDDLT
Data Valid before CLKOUT –
Set Up Time, Figure 14
Data Valid after CLKOUT –
Hold Time, Figure 14
Deserializer Lock Time,
Figure 13
VDDIO = 1.71 to 1.89V or 3.0 DO[23:0], CO1, CO2,
to 3.6V
CO3
CL = 4pF (lumped load)
VDDIO = 1.71 to 1.89V or 3.0 DO[23:0], CO1, CO2,
to 3.6V
CO3
CL = 4pF (lumped load)
SSC[3:0] = OFF,
CLKOUT = 10MHz
(Note 6)
SSC[3:0] = OFF,
(Note 6)
CLKOUT = 75MHz
SSC[3:0] = ON,
(Note 6)
CLKOUT = 10MHz
SSC[3:0] = ON,
(Note 6)
CLKOUT = 65MHz
tDD
Des Delay - Latency, Figure 11
CLKOUT = 10 to 75
MHz
tDPJ
Des Period Jitter
SSC[3:0] = OFF,
(Note 8)
CLKOUT = 10 MHz
CLKOUT = 65 MHz
CLKOUT = 75 MHz
tDCCJ Des Cycle-to-Cycle Jitter
SSC[3:0] = OFF,
(Note 9)
CLKOUT = 10 MHz
CLKOUT = 65 MHz
CLKOUT = 75 MHz
tIJT
Des Input Jitter Tolerance,
EQ = OFF,
Figure 16
SSCG = OFF,
CLKOUT = 75 MHz
jitter freq <2MHz
jitter freq >6MHz
BIST Mode
tPASS
BIST PASS Valid Time,
BISTEN = 1, Figure 17
Min Typ Max Units
13.3
T
100
ns
40
50
60
%
35
59
65
%
40
53
60
%
2.1
ns
2.0
ns
1.6
ns
1.5
ns
0.23
0.5
UI
0.33
0.5
UI
3
ms
4
ms
30
ms
6
ms
139*T 140*T ns
500 1000 ps
550 1250 ps
435
900
ps
375
900
ps
500 1150 ps
460 1000 ps
0.9
UI
0.5
UI
1
10
μs
13
www.national.com