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MC68HC908GZ16 Datasheet, PDF (51/314 Pages) Motorola, Inc – Microcontrollers
INTERNAL
DATA BUS
READ DDRBx
WRITE DDRBx
RESET
WRITE PTBx
READ PTBx
DDRBx
PTBx
Functional Description
DISABLE
PTBx
ADC CHANNEL x
ADC DATA REGISTER
DISABLE
CONVERSION
INTERRUPT COMPLETE
ADC
LOGIC
ADC
VOLTAGE IN
(VADIN)
CHANNEL
SELECT
ADCH4–ADCH0
AIEN COCO
CGMXCLK
BUS CLOCK
ADC CLOCK
CLOCK
GENERATOR
ADIV2–ADIV0 ADICLK
Figure 3-2. ADC Block Diagram
3.3.2 Voltage Conversion
When the input voltage to the ADC equals VREFH, the ADC converts the signal to $3FF (full scale). If the
input voltage equals VREFL, the ADC converts it to $000. Input voltages between VREFH and VREFL are a
straight-line linear conversion.
NOTE
The ADC input voltage must always be greater than VSSAD and less than
VDDAD.
Connect the VDDAD pin to the same voltage potential as the VDD pin, and
connect the VSSAD pin to the same voltage potential as the VSS pin.
The VDDAD pin should be routed carefully for maximum noise immunity.
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 1
Freescale Semiconductor
51