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MC68HC908GZ16 Datasheet, PDF (157/314 Pages) Motorola, Inc – Microcontrollers
Chapter 13
Input/Output (I/O) Ports
13.1 Introduction
Bidirectional input-output (I/O) pins form five parallel ports. All I/O pins are programmable as inputs or
outputs. All individual bits within port A, port C, and port D are software configurable with pullup devices
if configured as input port bits. The pullup devices are automatically and dynamically disabled when a port
bit is switched to output mode.
NOTE
Connect any unused I/O pins to an appropriate logic level, either VDD or
VSS. Although the I/O ports do not require termination for proper operation,
termination reduces excess current consumption and the possibility of
electrostatic damage.
Not all port pins are bonded out in all packages. Care sure be taken to make
any unbonded port pins an output to reduce them from being floating inputs.
Addr.
$0000
$0001
$0002
$0003
$0004
Register Name
Bit 7
6
5
Port A Data Register Read:
(PTA) Write:
See page 160. Reset:
PTA7
PTA6
PTA5
Read:
Port B Data Register
(PTB) Write:
See page 162.
Reset:
PTB7
PTB6
PTB5
Port C Data Register Read:
1
(PTC) Write:
See page 164. Reset:
PTC6
PTC5
Port D Data Register Read:
(PTD) Write:
See page 166. Reset:
PTD7
PTD6
PTD5
Read:
Data Direction Register A
(DDRA) Write:
See page 160.
Reset:
DDRA7
0
DDRA6
0
DDRA5
0
= Unimplemented
4
3
PTA4
PTA3
Unaffected by reset
PTB4
PTB3
Unaffected by reset
PTC4
PTC3
Unaffected by reset
PTD4
PTD3
Unaffected by reset
DDRA4 DDRA3
0
0
2
PTA2
PTB2
PTC2
PTD2
DDRA2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
Figure 13-1. I/O Port Register Summary
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 1
Freescale Semiconductor
157