MC68HC901 Datasheet, PDF (42/73 Pages) Motorola, Inc – Multi-Function Peripheral

Timers
TACR REGISTER
BIT
7
6
5
4
3
2
1
0
RESET
FIELD
*
*
*
AC3
AC2
AC1
AC0
TAO
RESET
0
0
0
0
0
0
0
0
ADDR
$19
TBCR REGISTER
BIT
7
6
5
4
3
2
1
0
RESET
FIELD
*
*
*
BC3
BC2
BC1
BC0
TBO
RESET
0
0
0
0
0
0
0
0
ADDR
$1B
Bits 7-5 — *Unused
Unused bits read as zero.
Reset TAO/TBO — Reset Timer A and B Output
TAO and TBO may be forced low at any time by writing a one to the reset location in TACR
and TBCR. Output is held low during the write operation, and at the end of the bus cycle the
output is allowed to toggle in response to a time-out pulse. When resetting TAO and TBO,
the other bits in the TCR must be written with their previous value to avoid altering the
operating mode.
AC3-AC0/BC3-BC0 — Select Timer A and B Operation Mode
When the timer is stopped, counting is inhibited. The contents of the timer’s main counter
are not affected, although any residual count in the prescaler is lost.
AC3
BC3
0
0
0
0
0
0
0
0
1
AC2
BC2
0
0
0
0
1
1
1
1
0
AC1
BC1
0
0
1
1
0
0
1
1
0
AC0
BC0
0
1
0
1
0
1
0
1
0
OPERATION MODE
Timer Stopped
Delay Mode, ÷ 4 Prescaler
Delay Mode, ÷ 10 Prescaler
Delay Mode, ÷ 16 Prescaler
Delay Mode, ÷ 50 Prescaler
Delay Mode, ÷ 64 Prescaler
Delay Mode, ÷ 100 Prescaler
Delay Mode, ÷ 200 Prescaler
Event Count Mode
6-5
MC68HC901 USER’S MANUAL
MOTOROLA