MC68307V Datasheet, PDF (29/34 Pages) Motorola, Inc – Technical Summary Integrated Multiple-Bus Processor

TCLK
TDI
TMS
TDO
TDO
TDO
V_IL
12
13
12
V_IH
10
11
Input data valid
Output data valid
Output data valid
Figure 15. Test Access Port Timing Diagram
PRELIMINARY TIMER MODULE ELECTRICAL SPECIFICATIONS
(V_CC = 5.0V ± 0.5V or 3.3Vdc ± 0.3V; GND = 0Vdc; T_A = T_L to T_H) (See Figure 16)
3.3 V
5V
Num
Characteristic
8 MHz
16.67 MHz
Unit
Min Max Min Max
1 Timer input capture pulse width
100
—
50
—
ns
2 TINclock low pulse width
100
—
50
—
ns
3 TIN clock high pulse width and input capture high pulse width
2
—
2
—
Clk
4 TIN clock cycle time
3
—
3
—
Clk
5 Clock high to TOUT valid
—
70
—
35
ns
NOTE: The TIN specifications do not apply to the use of TIN1 as a baud rate generator input clock. In such a case, spec-
ifications may be used.
Clock 0
TOUT
(output)
TIN
(input)
2
5
1
4
3
Figure 16. Timer Module Timing Diagram
MOTOROLA
MC68307 TECHNICAL INFORMATION
29