MT41J128M16HA-15ED Datasheet, PDF (86/211 Pages) Micron Technology – DDR3 SDRAM MT41J512M4 – 64 Meg x 4 x 8 Banks MT41J256M8 – 32 Meg x 8 x 8 Banks MT41J128M16 – 16 Meg x 16 x 8 Banks

Electrical Characteristics and AC Operating Conditions
Table 57: Electrical Characteristics and AC Operating Conditions for Speed Extensions
Notes 1–8 apply to the entire table
Parameter
Symbol
Clock period average: T_C = 0°C to 85°C
DLL disable mode
T_C = >85°C to 95°C
Clock period average: DLL enable mode
High pulse width average
Low pulse width average
Clock period jitter
DLL locked
DLL locking
Clock absolute period
t_CK
(DLL_DIS)
t_{CK (AVG)}
t_{CH (AVG)}
t_{CL (AVG)}
t_JITper
t_JITper,lck
t_{CK (ABS)}
Clock absolute high pulse width
t_{CH (ABS)}
DDR3-1866
DDR3-2133
Min
Max
Min
Max
Clock Timing
8
7800
8
7800
8
3900
8
3900
See Speed Bin Tables (page 71) for ^tCK range allowed ns
0.47
0.53
0.47
0.53
0.47
0.53
0.47
0.53
–60
60
–50
50
–50
50
–40
40
MIN = ^tCK (AVG) MIN +
t_{JITper MIN; MAX =}
t_{CK (AVG) MAX +}
t_{JITper MAX ps}
0.43
–
0.43
–
Clock absolute low pulse width
t_{CL (ABS)}
0.43
–
0.43
–
Cycle-to-cycle jitter
DLL locked
t_JITcc
120
120
DLL locking
t_JITcc,lck
100
100
Unit Notes
ns 9, 42
ns
42
10, 11
CK
12
CK
12
ps
13
ps
13
t_CK
14
(AVG)
t_CK
15
(AVG)
ps
16
ps
16