N25Q256A13E1240E Datasheet, PDF (7/91 Pages) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q256A

3V, 256Mb: Multiple I/O Serial Flash Memory
Device Description
All protocols support XIP operation. For flexibility, multiple XIP entry and exit methods
are available. For applications that must enter XIP mode immediately after powering
up, XIP mode can be set as the default mode through the nonvolatile configuration reg-
ister bits.
Device Configurability
The N25Q family offers additional features that are configured through the nonvolatile
configuration register for default and/or nonvolatile settings. Volatile settings can be
configured through the volatile and volatile-enhanced configuration registers. These
configurable features include the following:
• Number of dummy cycles for the fast READ commands
• Output buffer impedance
• SPI protocol types (extended SPI, DIO-SPI, or QIO-SPI)
• Required XIP mode
• Enabling/disabling HOLD (RESET function)
• Enabling/disabling wrap mode
Figure 1: Logic Diagram
V_CC
DQ0
C
S#
V_PP/W#/DQ2
HOLD#/DQ3
DQ1
RESET²
V_SS
Notes:
1. Reset functionality is available in devices with a dedicated part number. See Part Num-
ber Ordering Information for more details.
2. RESET is valid only for the N25Q256A83ESF40x and N25Q256A83E1240x devices. On
these devices, the additional RESET pin must be connected to an external pull-up.
PDF: 09005aef84566603
n25q_256mb_65nm.pdf - Rev. Q 05/13 EN
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