N25Q256A13E1240E Datasheet, PDF (27/91 Pages) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q256A

3V, 256Mb: Multiple I/O Serial Flash Memory
Nonvolatile and Volatile Registers
Table 17: Flag Status Register Bit Definitions (Continued)
Note 1 applies to entire table
Bit Name
Settings
6 Erase suspend 0 = Not in effect
1 = In effect
5 Erase
0 = Clear
1 = Failure or protection error
4 Program
0 = Clear
1 = Failure or protection error
3 V_PP
0 = Enabled
1 = Disabled (Default)
2 Program sus- 0 = Not in effect
pend
1 = In effect
1 Protection
0 = Clear
1 = Failure or protection error
0 Addressing
0 = 3 bytes addressing
1 = 4 bytes addressing
Description
Notes
Status bit: Indicates whether an ERASE operation has
3
been or is going to be suspended.
Error bit: Indicates whether an ERASE operation has
4, 5
succeeded or failed.
Error bit: An attempt to program a 0 to a 1 when V_PP = 4, 5
V_PPH and the data pattern is a multiple of 64 bits.
Error bit: Indicates an invalid voltage on V_PP during a
4, 5
PROGRAM or ERASE operation.
Status bit: Indicates whether a PROGRAM operation
3
has been or is going to be suspended.
Error bit: Indicates whether a PROGRAM operation has 4, 5
attempted to modify the protected array sector or ac-
cess the locked OTP space.
Status bit: Indicates whether 3-byte or 4-byte address
3
mode is enabled.
Notes:
1. Register bits are read by READ STATUS REGISTER command. All bits are volatile.
2. These program/erase controller settings apply only to PROGRAM or ERASE command cy-
cles in progress; they do not apply to a WRITE command cycle in progress.
3. Status bits are reset automatically.
4. Error bits must be reset by CLEAR FLAG STATUS REGISTER command.
5. Typical errors include operation failures and protection errors caused by issuing a com-
mand before the error bit has been reset to 0.
PDF: 09005aef84566603
n25q_256mb_65nm.pdf - Rev. Q 05/13 EN
27
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