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N25Q256A11ESF40F Datasheet, PDF (43/87 Pages) Micron Technology – Micron Serial NOR Flash Memory
1.8V, 256Mb: Multiple I/O Serial Flash Memory
READ MEMORY Operations
4-Byte Address
To execute 4-byte READ MEMORY commands, S# is driven LOW. The command code is
input on DQn, followed by input on DQn of four address bytes. Each address bit is
latched in during the rising edge of the clock. The addressed byte can be at any location,
and the address automatically increments to the next address after each byte of data is
shifted out; therefore, the entire memory can be read with a single command. The oper-
ation is terminated by driving S# HIGH at any time during data output.
Table 24: Command/Address/Data Lines for READ MEMORY Commands – 4-Byte Address
Notes 1 and 2 apply to entire table
STR Mode
DTR Mode
Extended SPI Protocol
Supported
Command Input
Address Input
Data Output
Dual SPI Protocol
Supported
Command Input
Address Input
Data Output
Quad SPI Protocol
Supported
Command Input
Address Input
Data Output
READ
03h/13h
–
Yes
DQ0
DQ0
DQ1
No
–
–
–
No
–
–
–
FAST
READ
0Bh/0Ch
0Dh
Command Name (4-Byte Address)
DUAL OUTPUT
FAST READ
DUAL
INPUT/OUTPUT
FAST READ
QUAD OUTPUT
FAST READ
3Bh/3Ch
BBh/BCh
6Bh/6Ch
3Dh
BDh
6Dh
QUAD
INPUT/OUTPUT
FAST READ
EBh/ECh
EDh
Yes
DQ0
DQ0
DQ1
Yes
DQ0
DQ0
DQ[1:0]
Yes
DQ0
DQ[1:0]
DQ[1:0]
Yes
DQ0
DQ0
DQ[3:0]
Yes
DQ0
DQ[3:0]
DQ[3:0]
Yes
Yes
Yes
No
No
DQ[1:0]
DQ[1:0]
DQ[1:0]
–
–
DQ[1:0]
DQ[1:0]
DQ[1:0]
–
–
DQ[1:0]
DQ[1:0]
DQ[1:0]
–
–
Yes
No
DQ[3:0]
–
DQ[3:0]
–
DQ[3:0]
–
No
Yes
Yes
–
DQ[3:0]
DQ[3:0]
–
DQ[3:0]
DQ[3:0]
–
DQ[3:0]
DQ[3:0]
Notes:
1. Yes in the "Supported" row for each protocol indicates that the command in that col-
umn is supported; when supported, a command's functionality is identical for the entire
column regardless of the protocol. For example, a FAST READ functions the same for all
three protocols even though its data is input/output differently depending on the pro-
tocol.
2. Command codes 13h, 0Ch, 3Ch, BCh, 6Ch, and ECh do not need to be set up in the ad-
dressing mode; they will work directly in 4-byte addressing mode.
3. A 4-BYTE FAST READ command is similar to 4-BYTE READ operation, but requires dum-
my clock cycles following the address bytes and can operate at a higher frequency (fC).
PDF: 09005aef846a804a
n25q_256mb_1_8V_65nm.pdf - Rev. G 2/2012 EN
43
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© 2012 Micron Technology, Inc. All rights reserved.