N25Q256A11ESF40F Datasheet, PDF (41/87 Pages) Micron Technology – Micron Serial NOR Flash Memory

1.8V, 256Mb: Multiple I/O Serial Flash Memory
READ MEMORY Operations
READ MEMORY Operations
The device supports default reading and writing to an A[MAX:MIN] of A[23:0] (3-byte
address).
Reading and writing to an A[MAX:MIN] of A[31:0] (4-byte address) is also supported. Se-
lection of the 3-byte or 4-byte address range can be enabled in two ways: setting the
nonvolatile configuration register or entering the ENABLE 4-BYTE ADDRESS MODE or
EXIT 4-BYTE ADDRESS MODE commands. Further details for these settings and com-
mands are in the respective register and command sections of the data sheet.
Note: When the device is set to the default address range of A[23:0], another method for
enabling 4-byte addressing is through the extended address register. Details can be
found in Nonvolatile and Volatile Registers.
3-Byte Address
To execute READ MEMORY commands, S# is driven LOW. The command code is input
on DQn, followed by input on DQn of three address bytes. Each address bit is latched in
during the rising edge of the clock. The addressed byte can be at any location, and the
address automatically increments to the next address after each byte of data is shifted
out; therefore, the entire memory can be read with a single command. The operation is
terminated by driving S# HIGH at any time during data output.
Table 23: Command/Address/Data Lines for READ MEMORY Commands
Note 1 applies to entire table
STR Mode
DTR Mode
Extended SPI Protocol
Supported
Command Input
Address Input
Data Output
Dual SPI Protocol
Supported
Command Input
Address Input
Data Output
Quad SPI Protocol
Supported
Command Input
Address Input
READ
03h
–
Yes
DQ0
DQ0
DQ1
No
–
–
–
No
–
–
FAST
READ
0Bh
0Dh
Command Name
DUAL
QUAD
DUAL OUTPUT INPUT/OUTPUT QUAD OUTPUT INPUT/OUTPUT
FAST READ FAST READ FAST READ FAST READ
3Bh
BBh
6Bh
EBh
3Dh
BDh
6Dh
EDh
Yes
DQ0
DQ0
DQ1
Yes
DQ0
DQ0
DQ[1:0]
Yes
DQ0
DQ[1:0]
DQ[1:0]
Yes
DQ0
DQ0
DQ[3:0]
Yes
DQ0
DQ[3:0]
DQ[3:0]
Yes
Yes
Yes
No
No
DQ[1:0]
DQ[1:0]
DQ[1:0]
–
–
DQ[1:0]
DQ[1:0]
DQ[1:0]
–
–
DQ[1:0]
DQ[1:0]
DQ[1:0]
–
–
Yes
No
DQ[3:0]
–
DQ[3:0]
–
No
Yes
Yes
–
DQ[3:0]
DQ[3:0]
–
DQ[3:0]
DQ[3:0]
PDF: 09005aef846a804a
n25q_256mb_1_8V_65nm.pdf - Rev. G 2/2012 EN
41
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© 2012 Micron Technology, Inc. All rights reserved.