N25Q256A11ESF40F Datasheet, PDF (4/87 Pages) Micron Technology – Micron Serial NOR Flash Memory

1.8V, 256Mb: Multiple I/O Serial Flash Memory
Features
List of Figures
Figure 1: Logic Diagram ................................................................................................................................... 7
Figure 2: 8-Lead, VDFPN8 – MLP8 (Top View) .................................................................................................. 8
Figure 3: 16-Lead, Plastic Small Outline – SO16 (Top View) ............................................................................... 8
Figure 4: 24-Ball TBGA (Balls Down) ................................................................................................................ 9
Figure 5: Block Diagram ................................................................................................................................ 12
Figure 6: Bus Master and Memory Devices on the SPI Bus ............................................................................... 18
Figure 7: SPI Modes ....................................................................................................................................... 18
Figure 8: Internal Configuration Register ........................................................................................................ 20
Figure 9: READ REGISTER Command ............................................................................................................ 30
Figure 10: WRITE REGISTER Command ......................................................................................................... 32
Figure 11: READ LOCK REGISTER Command ................................................................................................. 34
Figure 12: WRITE LOCK REGISTER Command ............................................................................................... 35
Figure 13: READ ID and MULTIPLE I/O Read ID Commands .......................................................................... 37
Figure 14: READ Command ........................................................................................................................... 44
Figure 15: FAST READ Command ................................................................................................................... 44
Figure 16: DUAL OUTPUT FAST READ Command – STR ................................................................................. 45
Figure 17: DUAL INPUT/OUTPUT FAST READ Command – STR ..................................................................... 45
Figure 18: QUAD OUTPUT FAST READ Command – STR ................................................................................ 46
Figure 19: QUAD INPUT/OUTPUT FAST READ Command – STR .................................................................... 46
Figure 20: FAST READ Command – DTR ......................................................................................................... 47
Figure 21: DUAL OUTPUT FAST READ Command – DTR ................................................................................ 48
Figure 22: DUAL INPUT/OUTPUT FAST READ Command – DTR .................................................................... 48
Figure 23: QUAD OUTPUT FAST READ Command – DTR ............................................................................... 49
Figure 24: QUAD INPUT/OUTPUT FAST READ Command – DTR ................................................................... 49
Figure 25: PAGE PROGRAM Command .......................................................................................................... 51
Figure 26: DUAL INPUT FAST PROGRAM Command ...................................................................................... 52
Figure 27: EXTENDED DUAL INPUT FAST PROGRAM Command ................................................................... 52
Figure 28: QUAD INPUT FAST PROGRAM Command ..................................................................................... 53
Figure 29: EXTENDED QUAD INPUT FAST PROGRAM Command ................................................................... 54
Figure 30: WRITE ENABLE and WRITE DISABLE Command Sequence ............................................................ 56
Figure 31: SUBSECTOR and SECTOR ERASE Command .................................................................................. 58
Figure 32: BULK ERASE Command ................................................................................................................ 59
Figure 33: RESET ENABLE and RESET MEMORY Command ........................................................................... 62
Figure 34: READ OTP Command .................................................................................................................... 63
Figure 35: PROGRAM OTP Command ............................................................................................................ 65
Figure 36: XIP Mode Directly After Power-On .................................................................................................. 68
Figure 37: Power-Up Timing .......................................................................................................................... 70
Figure 38: Reset AC Timing During PROGRAM or ERASE Cycle ........................................................................ 73
Figure 39: Reset Enable ................................................................................................................................. 73
Figure 40: Serial Input Timing ........................................................................................................................ 73
Figure 41: Write Protect Setup and Hold During WRITE STATUS REGISTER Operation (SRWD = 1) ................... 74
Figure 42: Hold Timing .................................................................................................................................. 75
Figure 43: Output Timing .............................................................................................................................. 75
Figure 44: V_PPH Timing .................................................................................................................................. 76
Figure 45: AC Timing Input/Output Reference Levels ...................................................................................... 78
Figure 46: V-PDFN-8/8mm x 6mm ................................................................................................................. 82
Figure 47: SOP2-16/300 mils .......................................................................................................................... 83
Figure 48: T-PBGA-24b05/6mm x 8mm .......................................................................................................... 84
PDF: 09005aef846a804a
n25q_256mb_1_8V_65nm.pdf - Rev. G 2/2012 EN
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