MT40A512M8RH-075EAUT Datasheet, PDF (352/359 Pages) Micron Technology – Automotive DDR4 SDRAM

Table 159: Electrical Characteristics and AC Timing Parameters (Continued)
DDR4-2666
DDR4-2933
DDR4-3200
Parameter
Symbol
Min Max Min Max Min Max
MRS command update delay in PDA
mode
t_MOD
MIN = greater of (24nCK, 15ns)
MRS command update delay
t_{MOD_PDA}
MIN = ^tMOD
MRS command update delay in CAL
mode
t_{MOD_CAL}
MIN = ^tMOD + ^tCAL
MRS commandto DQS drive in preamble
training
t_SDO
MIN = ^tMOD + 9ns
MPR Command Timing
Multipurpose register recovery time
t_MPR
MIN = 1nCK
Multipurpose register write recovery time ^tWR_MPR
MIN = ^tMOD + AL + PL
CRC Error Reporting Timing
CRC error to ALERT_n latency
t_{CRC_ALERT}
3
13
3
13
3
13
CRC ALERT_n pulse width
t_{CRC_ALERT_P 6}
10
6
10
6
10
W
CA Parity Timing
Parity latency
PL
5
–
6
–
6
–
Commands uncertain to be executed dur-
ing this time
t_{PAR_UN-}
KNOWN
–
PL
–
PL
–
PL
Delay from errant command to ALERT_n ^tPAR_ALERT_O –
PL +
–
PL +
–
PL +
assertion
N
6ns
6ns
6ns
Pulse width of ALERT_n signal when as- ^tPAR_ALERT_P 80
160
88
176
96
192
serted
W
Time from alert asserted until DES com- ^tPAR_ALERT_RS –
71
–
78
–
85
mands required in persistent CA parity
P
mode
CAL Timing
CS_n to command address latency
t_CAL
5
–
6
–
6
–
CS_n to command address latency in
gear-down mode
t_CALg
6
–
8
–
8
–
MPSM Timing
Command path disable delay upopn
MPSM entry
t_MPED
MIN = ^tMOD (MIN) + ^tCPDED (MIN)
Reserved
Min Max
Unit
CK
CK
CK
CK
ns
CK
CK
CK
CK
CK
CK
CK
CK
CK
Notes
1
1