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MT40A512M8RH-075EAUT Datasheet, PDF (254/359 Pages) Micron Technology – Automotive DDR4 SDRAM
4Gb: x8, x16 Automotive DDR4 SDRAM
Asynchronous ODT Mode
Asynchronous ODT Mode
Asynchronous ODT mode is selected when the DRAM runs in DLL-off mode. In asyn-
chronous ODT timing mode, the internal ODT command is not delayed by either addi-
tive latency (AL) or the parity latency (PL) relative to the external ODT signal (RTT(NOM)).
In asynchronous ODT mode, two timing parameters apply: tAONAS (MIN/MAX), and
tAOFAS (MIN/MAX).
RTT(NOM) Turn-on Time
• Minimum RTT(NOM) turn-on time (tAONAS [MIN]) is when the device termination cir-
cuit leaves RTT(Park) and ODT resistance begins to turn on.
• Maximum RTT(NOM) turn-on time (tAONAS [MAX]) is when the ODT resistance has
reached RTT(NOM).
• tAONAS (MIN) and tAONAS (MAX) are measured from ODT being sampled HIGH.
RTT(NOM) Turn-off Time
• Minimum RTT(NOM) turn-off time (tAOFAS [MIN]) is when the device's termination
circuit starts to leave RTT(NOM).
• Maximum RTT(NOM) turn-off time (tAOFAS [MAX]) is when the on-die termination has
reached RTT(Park).
• tAOFAS (MIN) and tAOFAS (MAX) are measured from ODT being sampled LOW.
Figure 202: Asynchronous ODT Timings with DLL Off
T0
T1
T2
T3
T4
T5
T6
Ti
Ti + 1 Ti + 2 Ti + 3 Ti + 4 Ti + 5 Ti + 6
Ta
Tb
diff_CK
CKE
ODT
tIH
tIS
tIH
tIS
RTT
RTT(Park)
tAONAS (MAX)
tAONAS (MIN)
RTT(NOM)
tAONAS (MIN)
tAONAS (MAX)
Transitioning
CCMTD-1725822587-10418
4gb_auto_ddr4_sdram_z90b.pdf - Rev. D 01/17 EN
254
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