MT9VDDT3272AG Datasheet, PDF (23/27 Pages) Micron Technology – DDR SDRAM UNBUFFERED DIMM

128MB, 256MB, 512MB (x72, ECC, SR), PC3200
184-Pin DDR SDRAM UDIMM
Table 17: EEPROM Device Select Code
Most significant bit (b7) is sent first
SELECT CODE
Memory Area Select Code (two arrays)
Protection Register Select Code
DEVICE TYPE IDENTIFIER
b7
b6
b5
b4
1
0
1
0
0
1
1
0
CHIP ENABLE
RW
b3
b2
b1
b0
SA2 SA1 SA0 RW
SA2 SA1 SA0 RW
Table 18: EEPROM Operating Modes
MODE
Current Address Read
Random Address Read
Sequential Read
Byte Write
Page Write
RW BIT
1
0
1
1
0
0
WC
VIH or VIL
VIH or VIL
VIH or VIL
VIH or VIL
VIL
VIL
BYTES
1
1
1
≥1
1
≤ 16
INITIAL SEQUENCE
START, Device Select, RW = ‘1’
START, Device Select, RW = ‘0’, Address
reSTART, Device Select, RW = ‘1’
Similar to Current or Random Address Read
START, Device Select, RW = ‘0’
START, Device Select, RW = ‘0’
SCL
SDA IN
SDA OUT
Figure 13: SPD EEPROM Timing Diagram
tF
tHIGH
tR
tLOW
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
tSU:STO
tAA
tDH
tBUF
UNDEFINED
pdf: 09005aef80a43e7d, source: 09005aef80a43d77
DDA9C16_32_64x72AG.fm - Rev. B 9/04 EN
23
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©2004 Micron Technology, Inc.