MT41J128M16JT-125K Datasheet, PDF (123/211 Pages) Micron Technology – DDR3 SDRAM MT41J512M4 64 Meg x 4 x 8 Banks MT41J256M8 32 Meg x 8 x 8 Banks MT41J128M16 16 Meg x 16 x 8 Banks

Figure 43: DLL Disable ^tDQSCK
CK#
CK
Command
T0
READ
Address
Valid
DQS, DQS# DLL on
DQ BL8 DLL on
DQS, DQS# DLL off
DQ BL8 DLL disable
DQS, DQS# DLL off
DQ BL8 DLL disable
T1
T2
T3
T4
NOP
NOP
NOP
NOP
RL = AL + CL = 6 (CL = 6, AL = 0)
CL = 6
RL (DLL_DIS) = AL + (CL - 1) = 5
2Gb: x4, x8, x16 DDR3 SDRAM
Commands
T5
T6
T7
T8
T9
T10
NOP
NOP
NOP
NOP
NOP
NOP
DI
b
t^{DQSCK (DLL_DIS) MIN}
DI
b+1
DI
b+2
DI
b+3
DI
b+4
DI
b+5
DI
b+6
DI
b+7
DI
DI
DI
DI
b
b+1 b+2 b+3
t_{DQSCK (DLL_DIS) MAX}
DI
b+4
DI
b+5
DI
b+6
DI
b+7
DI
DI
DI
DI
DI
DI
DI
DI
b
b+1 b+2 b+3 b+4 b+5 b+6 b+7
Transitioning Data
Don’t Care
Table 74: READ Electrical Characteristics, DLL Disable Mode
Parameter
Access window of DQS from CK, CK#
Symbol
t_{DQSCK (DLL_DIS)}
Min
1
Max
10
Unit
ns
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf - Rev. Q 04/13 EN
123
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