PIC16F636T-I Datasheet, PDF (99/234 Pages) Microchip Technology – 8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC12F635/PIC16F636/639
11.0 ANALOG FRONT-END (AFE)
FUNCTIONAL DESCRIPTION
(PIC16F639 ONLY)
The PIC16F639 device consists of the PIC16F636
device and low frequency (LF) Analog Front-End
(AFE), with the AFE section containing three
analog-input channels for signal detection and LF
talk-back. This section describes the Analog Front-End
(AFE) in detail.
The PIC16F639 device can detect a 125 kHz input
signal as low as 1 mVpp and transmit data by using
internal LF talk-back modulation or via an external
transmitter. The PIC16F639 can also be used for
various bidirectional communication applications.
Figure 11-3 and Figure 11-4 show application examples
of the device.
Each analog input channel has internal tuning
capacitance, sensitivity control circuits, an input signal
strength limiter and an LF talk-back modulation
transistor. An Automatic Gain Control (AGC) loop is
used for all three input channel gains. The output of
each channel is OR’d and fed into a demodulator. The
digital output is passed to the LFDATA pin. Figure 11-1
shows the block diagram of the AFE and Figure 11-2
shows the LC input path.
There are a total of eight Configuration registers. Six of
them are used for AFE operation options, one for
column parity bits and one for status indication of AFE
operation. Each register has 9 bits including one row
parity bit. These registers are readable and writable by
SPI (Serial Protocol Interface) commands except for
the STATUS register, which is read-only.
11.1 RF Limiter
The RF Limiter limits LC pin input voltage by de-Q’ing
the attached LC resonant circuit. The absolute voltage
limit is defined by the silicon process’s maximum
allowed input voltage (see Section 15.0 “Electrical
Specifications”). The limiter begins de-Q’ing the
external LC antenna when the input voltage exceeds
VDE_Q, progressively de-Q’ing harder to reduce the
antenna input voltage.
The signal levels from all 3 channels are combined
such that the limiter attenuates all 3 channels
uniformly, in respect to the channel with the strongest
signal.
11.2 Modulation Circuit
The modulation circuit consists of a modulation
transistor (FET), internal tuning capacitors and external
LC antenna components. The modulation transistor
and the internal tuning capacitors are connected
between the LC input pin and LCCOM pin. Each LC
input has its own modulation transistor.
When the modulation transistor turns on, its low Turn-on
Resistance (RM) clamps the induced LC antenna
voltage. The coil voltage is minimized when the
modulation transistor turns-on and maximized when the
modulation transistor turns-off. The modulation
transistor’s low Turn-on Resistance (RM) results in a
high modulation depth.
The LF talk-back is achieved by turning on and off the
modulation transistor.
The modulation data comes from the microcontroller
section via the digital SPI interface as “Clamp On”,
“Clamp Off” commands. Only those inputs that are
enabled will execute the clamp command. A basic
block diagram of the modulation circuit is shown in
Figure 11-1 and Figure 11-2.
The modulation FET is also shorted momentarily after
Soft Reset and Inactivity timer time-out.
11.3 Tuning Capacitor
Each channel has internal tuning capacitors for external
antenna tuning. The capacitor values are programmed
by the Configuration registers up to 63 pF, 1 pF per step.
Note:
The user can control the tuning capacitor
by programming the AFE Configuration
registers.
11.4 Variable Attenuator
The variable attenuator is used to attenuate, via AGC
control, the input signal voltage to avoid saturating the
amplifiers and demodulators.
Note:
The variable attenuator function is
accomplished by the device itself. The
user cannot control its function.
11.5 Sensitivity Control
The sensitivity of each channel can be reduced by the
channel’s Configuration register sensitivity setting.
This is used to desensitize the channel from optimum.
Note:
The user can desensitize the channel
sensitivity by programming the AFE
Configuration registers.
© 2007 Microchip Technology Inc.
DS41232D-page 97