PIC16F636T-I Datasheet, PDF (118/234 Pages) Microchip Technology – 8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC12F635/PIC16F636/639
11.31.3 RECEIVED SIGNAL STRENGTH
INDICATOR (RSSI) OUTPUT
An analog current is available at the LFDATA pin when
the Received Signal Strength Indicator (RSSI) output is
selected for the AFE’s Configuration register. The analog
current is linearly proportional to the input signal strength
(see Figure 11-15).
All timers in the circuit, such as inactivity timer, alarm
timer, and AGC settling time, are disabled during the
RSSI mode. Therefore, the RSSI output is not affected
by the AGC settling time, and available immediately
when the RSSI option is selected. The AFE enters
Active mode immediately when the RSSI output is
selected. The MCU I/O pin (RC3) connected to the
LFDATA pin, must be set to high-impedance state
during the RSSI Output mode.
When the AFE receives an SPI command during the
RSSI output, the RSSI mode is temporary disabled
until the SPI interface communication is completed. It
returns to the RSSI mode again after the SPI interface
communication is completed. The AFE holds the RSSI
mode until another output type is selected (CS low
turns off the RSSI signal). To obtain the RSSI output
for a particular input channel, or to save operating
power, the input channel can be individually enabled
or disabled. If more than one channel is enabled, the
RSSI output is from the strongest signal channel.
There will be no valid output if all three channels are
disabled.
Related AFE Configuration register bits:
• Configuration Register 1 (Register 11-2),
DATOUT<8:7>:
bit 8 bit 7
0
0: Demodulated Output
0
1: Carrier Clock Output
1
0: RSSI Output
1
1: RSSI Output
• Configuration Register 2 (Register 11-3),
RSSIFET<8>:
0: Pull-Down MOSFET off
1: Pull-Down MOSFET on.
Note:
The pull-down MOSFET option is valid
only when the RSSI output is selected.
The MOSFET is not controllable by users
when Demodulated or Carrier Clock
output option is selected.
• Configuration Register 0 (Register 11-1): all bits
are affected.
FIGURE 11-14: RSSI OUTPUT PATH
RSSI Output Current
Generator
VDD
Off
if RSSI active
Current Output
RSSIFET
RC3/LFDATA/RSSI/CCLK Pin
RSSI Pull-down MOSFET
(controlled by Config. 2, bit 8)
DS41232D-page 116
© 2007 Microchip Technology Inc.