PIC16F636T-I Datasheet, PDF (57/234 Pages) Microchip Technology – 8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC12F635/PIC16F636/639
4.2.4.5 RA4/T1G/OSC2/CLKOUT
Figure 4-5 shows the diagram for this pin. The RA4 pin
is configurable to function as one of the following:
• a general purpose I/O
• a Timer1 gate input
• a crystal/resonator connection
• a clock output
FIGURE 4-5:
BLOCK DIAGRAM OF RA4
Data Bus
DQ
WR
WPUDA
CK _Q
RD
WPUDA
CLK⁽¹⁾ Modes
RAPU
WR
WDA
RD
WDA
DQ
CK _Q
WR
PORTA
DQ
CK _Q
WR
TRISA
DQ
CK _Q
RD
TRISA
RD
PORTA
DQ
WR
IOCA
CK _Q
RD
IOCA
Oscillator
Circuit
OSC1
CLKOUT
Enable
FOSC/4 1
0
CLKOUT
Enable
INTOSC/
RC/EC⁽²⁾
CLKOUT
Enable
XTAL
QD
EN
QD
Interrupt-on-
change
T1G To Timer1
EN
RD PORTA
VDD
Weak
Weak
VSS
VDD
I/O pin
VSS
Q1
Note 1:
2:
Oscillator modes are XT, HS, LP, LPTMR1 and
CLKOUT Enable.
With CLKOUT option.
4.2.4.6 RA5/T1CKI/OSC1/CLKIN
Figure 4-6 shows the diagram for this pin. The RA5 pin
is configurable to function as one of the following:
• a general purpose I/O
• a Timer1 clock input
• a crystal/resonator connection
• a clock input
FIGURE 4-6:
BLOCK DIAGRAM OF RA5
Data Bus
DQ
WR
WPUDA
CK _Q
RD
WPUDA
WR
WDA
DQ
CK _Q
CLK⁽¹⁾ Modes
RAPU
VDD
Weak
Weak
VSS
RD
WDA
DQ
WR
PORTA
CK _Q
WR
TRISA
DQ
CK _Q
RD
TRISA
RD
PORTA
DQ
WR
IOCA
CK _Q
RD
IOCA
Oscillator
Circuit
OSC2
VDD
INTOSC
Mode
I/O pin
VSS
(2)
QD
EN
Q1
QD
Interrupt-on-
change
EN
RD PORTA
T1G To Timer1
Note 1: Oscillator modes are XT, HS, LP and LPTMR1.
2: When using Timer1 with LP oscillator, the
Schmitt Trigger is bypassed.
© 2007 Microchip Technology Inc.
DS41232D-page 55