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PIC16F526 Datasheet, PDF (77/122 Pages) Microchip Technology – 14-Pin, 8-Bit Flash Microcontroller | |||
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RETLW
Return with Literal in W
Syntax:
[ label ] RETLW k
Operands:
0 ï£ k ï£ 255
Operation:
k ï® (W);
TOS ï® PC
Status Affected: None
Description:
The W register is loaded with the
eight-bit literal âkâ. The program
counter is loaded from the top of
the stack (the return address). This
is a two-cycle instruction.
RLF
Rotate Left f through Carry
Syntax:
[ label ]
RLF f,d
Operands:
0 ï£ f ï£ 31
d ï [0,1]
Operation:
See description below
Status Affected: C
Description:
The contents of register âfâ are
rotated one bit to the left through
the Carry flag. If âdâ is â0â, the result
is placed in the W register. If âdâ is
â1â, the result is stored back in
register âfâ.
C
register âfâ
RRF
Rotate Right f through Carry
Syntax:
[ label ] RRF f,d
Operands:
0 ï£ f ï£ 31
d ï [0,1]
Operation:
See description below
Status Affected: C
Description:
The contents of register âfâ are
rotated one bit to the right through
the Carry flag. If âdâ is â0â, the result
is placed in the W register. If âdâ is
â1â, the result is placed back in
register âfâ.
C
register âfâ
PIC16F526
SLEEP
Enter SLEEP Mode
Syntax:
[label ] SLEEP
Operands:
None
Operation:
00h ï® WDT;
0 ï® WDT prescaler;
1 ï® TO;
0 ï® PD
Status Affected: TO, PD, RBWUF
Description:
Time-out Status bit (TO) is set. The
Power-down Status bit (PD) is
cleared.
RBWUF is unaffected.
The WDT and its prescaler are
cleared.
The processor is put into Sleep
mode with the oscillator stopped.
See Section 8.9 âPower-down
Mode (Sleep)â on Sleep for more
details.
SUBWF
Subtract W from f
Syntax:
[label ] SUBWF f,d
Operands:
0 ï£ï f ï£ï 31
d ï [0,1]
Operation:
(f) â (W) ï®ï ï¨dest)
Status Affected: C, DC, Z
Description:
Subtract (2âs complement method)
the W register from register âfâ. If âdâ
is â0â, the result is stored in the W
register. If âdâ is â1â, the result is
stored back in register âfâ.
SWAPF
Swap Nibbles in f
Syntax:
[ label ] SWAPF f,d
Operands:
0 ï£ f ï£ 31
d ï [0,1]
Operation:
(f<3:0>) ï® (dest<7:4>);
(f<7:4>) ï® (dest<3:0>)
Status Affected: None
Description:
The upper and lower nibbles of
register âfâ are exchanged. If âdâ is
â0â, the result is placed in W
register. If âdâ is â1â, the result is
placed in register âfâ.
ï£ 2010 Microchip Technology Inc.
DS41326D-page 77
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