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PIC16F526 Datasheet, PDF (11/122 Pages) Microchip Technology – 14-Pin, 8-Bit Flash Microcontroller
3.0 ARCHITECTURAL OVERVIEW
The high performance of the PIC16F526 device can
be attributed to a number of architectural features
commonly found in RISC microprocessors. To begin
with, the PIC16F526 device uses a Harvard
architecture in which program and data are accessed
on separate buses. This improves bandwidth over
traditional von Neumann architectures where program
and data are fetched on the same bus. Separating
program and data memory further allows instructions
to be sized differently than the 8-bit wide data word.
Instruction opcodes are 12 bits wide, making it
possible to have all single-word instructions. A 12-bit
wide program memory access bus fetches a 12-bit
instruction in a single cycle. A two-stage pipeline
overlaps fetch and execution of instructions.
Consequently, all instructions (33) execute in a single
cycle (200 ns @ 20 MHz, 1 s @ 4 MHz) except for
program branches.
Table 3-1 below lists memory supported by the
PIC16F526 device.
TABLE 3-1: PIC16F526 MEMORY
Device
Program
Memory
Flash
(words)
Data Memory
SRAM
(bytes)
Flash
(bytes)
PIC16F526
1024
67
64
The PIC16F526 device can directly or indirectly
address its register files and data memory. All Special
Function Registers (SFR), including the PC, are
mapped in the data memory. The PIC16F526 device
has a highly orthogonal (symmetrical) instruction set
that makes it possible to carry out any operation, on
any register, using any Addressing mode. This sym-
metrical nature and lack of “special optimal situations”
make programming with the PIC16F526 device simple,
yet efficient. In addition, the learning curve is reduced
significantly.
PIC16F526
The PIC16F526 device contains an 8-bit ALU and
working register. The ALU is a general purpose arith-
metic unit. It performs arithmetic and Boolean functions
between data in the working register and any register
file.
The ALU is 8 bits wide and capable of addition, subtrac-
tion, shift and logical operations. Unless otherwise
mentioned, arithmetic operations are two’s comple-
ment in nature. In two-operand instructions, one
operand is typically the W (working) register. The other
operand is either a file register or an immediate
constant. In single operand instructions, the operand is
either the W register or a file register.
The W register is an 8-bit working register used for ALU
operations. It is not an addressable register.
Depending on the instruction executed, the ALU may
affect the values of the Carry (C), Digit Carry (DC) and
Zero (Z) bits in the STATUS register. The C and DC bits
operate as a borrow and digit borrow out bit,
respectively, in subtraction. See the SUBWF and ADDWF
instructions for examples.
A simplified block diagram is shown in Figure 3-2, with
the corresponding device pins described in Table 3-2.
 2010 Microchip Technology Inc.
DS41326D-page 11