PIC16F526 Datasheet, PDF (72/122 Pages) Microchip Technology – 14-Pin, 8-Bit Flash Microcontroller

PIC16F526
TABLE 12-2: INSTRUCTION SET SUMMARY
Mnemonic,
Operands
Description
Cycles
12-Bit Opcode
MSb
LSb
Status
Affected
Notes
ADDWF f, d Add W and f
ANDWF f, d AND W with f
CLRF
f
Clear f
CLRW
— Clear W
COMF
f, d Complement f
DECF
f, d Decrement f
DECFSZ f, d Decrement f, Skip if 0
INCF
f, d Increment f
INCFSZ f, d Increment f, Skip if 0
IORWF
f, d Inclusive OR W with f
MOVF
f, d Move f
MOVWF f
Move W to f
NOP
— No Operation
RLF
f, d Rotate left f through Carry
RRF
f, d Rotate right f through Carry
SUBWF f, d Subtract W from f
SWAPF f, d Swap f
XORWF f, d Exclusive OR W with f
1 0001 11df ffff C, DC, Z 1, 2, 4
1 0001 01df ffff
Z
2, 4
1 0000 011f ffff
Z
4
1 0000 0100 0000
Z
1 0010 01df ffff
Z
1 0000 11df ffff
Z
2, 4
1⁽²⁾ 0010 11df ffff None 2, 4
1 0010 10df ffff
Z
2, 4
1⁽²⁾ 0011 11df ffff None 2, 4
1 0001 00df ffff
Z
2, 4
1 0010 00df ffff
Z
2, 4
1 0000 001f ffff None 1, 4
1 0000 0000 0000 None
1 0011 01df ffff
C
2, 4
1 0011 00df ffff
C
2, 4
1 0000 10df ffff C, DC, Z 1, 2, 4
1 0011 10df ffff None 2, 4
1 0001 10df ffff
Z
2, 4
BIT-ORIENTED FILE REGISTER OPERATIONS
BCF
BSF
BTFSC
BTFSS
f, b Bit Clear f
f, b Bit Set f
f, b Bit Test f, Skip if Clear
f, b Bit Test f, Skip if Set
1 0100 bbbf ffff None 2, 4
1 0101 bbbf ffff None 2, 4
1⁽²⁾ 0110 bbbf ffff None
1⁽²⁾ 0111 bbbf ffff None
LITERAL AND CONTROL OPERATIONS
ANDLW k
CALL
k
CLRWDT —
GOTO
k
IORLW
k
MOVLW k
OPTION —
RETLW k
SLEEP
—
TRIS
f
XORLW k
AND literal with W
Call Subroutine
Clear Watchdog Timer
Unconditional branch
Inclusive OR literal with W
Move literal to W
Load OPTION register
Return, place literal in W
Go into Standby mode
Load TRIS register
Exclusive OR literal to W
1 1110 kkkk kkkk
Z
2 1001 kkkk kkkk None
1
1 0000 0000 0100 TO, PD
2 101k kkkk kkkk None
1 1101 kkkk kkkk
Z
1 1100 kkkk kkkk None
1 0000 0000 0010 None
2 1000 kkkk kkkk None
1 0000 0000 0011 TO, PD
1 0000 0000 0fff None
3
1 1111 kkkk kkkk
Z
Note 1: The 9th bit of the program counter will be forced to a ‘0’ by any instruction that writes to the PC except for
GOTO. See Section 4.6 “Program Counter”.
2: When an I/O register is modified as a function of itself (e.g. MOVF PORTB, 1), the value used will be that
value present on the pins themselves. For example, if the data latch is ‘1’ for a pin configured as input and
is driven low by an external device, the data will be written back with a ‘0’.
3: The instruction TRIS f, where f = 6, causes the contents of the W register to be written to the tri-state
latches of PORTB. A ‘1’ forces the pin to a high-impedance state and disables the output buffers.
4: If this instruction is executed on the TMR0 register (and, where applicable, d = 1), the prescaler will be
cleared (if assigned to TMR0).
DS41326D-page 72
 2010 Microchip Technology Inc.