PIC18F23K20_10 Datasheet, PDF (60/456 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F2XK20/4XK20
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
FSR1H
FSR1L
BSR
INDF2
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
---- 0000
xxxx xxxx
---- 0000
N/A
---- 0000
uuuu uuuu
---- 0000
N/A
---- uuuu
uuuu uuuu
---- uuuu
N/A
POSTINC2
POSTDEC2
PREINC2
PLUSW2
FSR2H
FSR2L
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
N/A
---- 0000
xxxx xxxx
N/A
N/A
N/A
N/A
---- 0000
uuuu uuuu
N/A
N/A
N/A
N/A
---- uuuu
uuuu uuuu
STATUS
TMR0H
TMR0L
T0CON
OSCCON
HLVDCON
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
---x xxxx
0000 0000
xxxx xxxx
1111 1111
0011 qq00
0-00 0101
---u uuuu
0000 0000
uuuu uuuu
1111 1111
0011 qq00
0-00 0101
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
u-uu uuuu
WDTCON
RCON⁽⁴⁾
TMR1H
TMR1L
T1CON
TMR2
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
---- ---0
0q-1 11q0
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
---- ---0
0u-q qquu
uuuu uuuu
uuuu uuuu
u0uu uuuu
0000 0000
---- ---u
uu-u qquu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
1111 1111
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
1111 1111
-000 0000
uuuu uuuu
0000 0000
0000 0000
0000 0000
1111 1111
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
SSPCON2
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
Legend:
Note 1:
2:
3:
4:
5:
6:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as
PORTA pins, they are disabled and read ‘0’.
All bits of the ANSELH register initialize to ‘0’ if the PBADEN bit of CONFIG3H is ‘0’.
DS41303G-page 60
 2010 Microchip Technology Inc.