PIC18F23K20_10 Datasheet, PDF (145/456 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology

11.2 Capture Mode
In Capture mode, the CCPRxH:CCPRxL register pair
captures the 16-bit value of the TMR1 or TMR3
registers when an event occurs on the corresponding
CCPx pin. An event is defined as one of the following:
• every falling edge
• every rising edge
• every 4th rising edge
• every 16th rising edge
The event is selected by the mode select bits,
CCPxM<3:0> of the CCPxCON register. When a cap-
ture is made, the interrupt request flag bit, CCPxIF, is
set; it must be cleared by software. If another capture
occurs before the value in register CCPRx is read, the
old captured value is overwritten by the new captured
value.
11.2.1 CCP PIN CONFIGURATION
In Capture mode, the appropriate CCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
Note:
If the CCPx pin is configured as an output,
a write to the port can cause a capture
condition.
11.2.2 TIMER1/TIMER3 MODE SELECTION
The timers that are to be used with the capture feature
(Timer1 and/or Timer3) must be running in Timer mode
or Synchronized Counter mode. In Asynchronous Coun-
ter mode, the capture operation may not work. The timer
to be used with each CCP module is selected in the
T3CON register (see Section 11.1.1 “CCP Modules
and Timer Resources”).
11.2.3 SOFTWARE INTERRUPT
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit clear to avoid false inter-
rupts. The interrupt flag bit, CCPxIF, should also be
cleared following any such change in operating mode.
11.2.4 CCP PRESCALER
There are four prescaler settings in Capture mode; they
are specified as part of the operating mode selected by
the mode select bits (CCPxM<3:0>). Whenever the
CCP module is turned off or Capture mode is disabled,
the prescaler counter is cleared. This means that any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 11-1 shows the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
PIC18F2XK20/4XK20
EXAMPLE 11-1:
CHANGING BETWEEN
CAPTURE PRESCALERS
(CCP2 SHOWN)
CLRF
MOVLW
MOVWF
CCP2CON
; Turn CCP module off
NEW_CAPT_PS ; Load WREG with the
; new prescaler mode
; value and CCP ON
CCP2CON
; Load CCP2CON with
; this value
 2010 Microchip Technology Inc.
DS41303G-page 145