PIC18F23K20_10 Datasheet, PDF (170/456 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F2XK20/4XK20
15.1 Timer3 Operation
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
The operating mode is determined by the clock select
bit, TMR3CS of the T3CON register. When TMR3CS is
cleared (= 0), Timer3 increments on every internal
instruction cycle (FOSC/4). When the bit is set, Timer3
increments on every rising edge of the Timer1 external
clock input or the Timer1 oscillator, if enabled.
As with Timer1, the digital circuitry associated with the
RC1/T1OSI and RC0/T1OSO/T13CKI pins is disabled
when the Timer1 oscillator is enabled. This means the
values of TRISC<1:0> are ignored and the pins are
read as ‘0’.
FIGURE 15-1:
TIMER3 BLOCK DIAGRAM
Timer1 Oscillator
Timer1 Clock Input
1
T1OSO/T13CKI
T1OSI
T1OSCEN⁽¹⁾
1
FOSC/4
Internal
Clock
0
TMR3CS
Prescaler
1, 2, 4, 8
2
Synchronize
Detect
0
Sleep Input
T3CKPS<1:0>
T3SYNC
TMR3ON
Timer3
On/Off
CCP1/CCP2 Special Event Trigger
CCP1/CCP2 Select from T3CON<6,3>
Clear TMR3
TMR3L
TMR3
High Byte
Set
TMR3IF
on Overflow
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
DS41303G-page 170
 2010 Microchip Technology Inc.