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PIC18F25K20T-ISS Datasheet, PDF (59/456 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology
PIC18F2XK20/4XK20
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
TOSU
TOSH
TOSL
STKPTR
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
uu-0 0000
---0 uuuu(3)
uuuu uuuu(3)
uuuu uuuu(3)
uu-u uuuu(3)
PCLATU
PIC18F2XK20 PIC18F4XK20
---0 0000
---0 0000
---u uuuu
PCLATH
PCL
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
PC + 2(2)
TBLPTRU
PIC18F2XK20 PIC18F4XK20
--00 0000
--00 0000
--uu uuuu
TBLPTRH
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
TBLPTRL
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
TABLAT
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
PRODH
PIC18F2XK20 PIC18F4XK20
xxxx xxxx
uuuu uuuu
uuuu uuuu
PRODL
INTCON
INTCON2
INTCON3
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
xxxx xxxx
0000 000x
1111 -1-1
11-0 0-00
uuuu uuuu
0000 000u
1111 -1-1
11-0 0-00
uuuu uuuu
uuuu uuuu(1)
uuuu -u-u(1)
uu-u u-uu(1)
INDF0
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
POSTINC0
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
POSTDEC0
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
PREINC0
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
PLUSW0
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
FSR0H
PIC18F2XK20 PIC18F4XK20
---- 0000
---- 0000
---- uuuu
FSR0L
PIC18F2XK20 PIC18F4XK20
xxxx xxxx
uuuu uuuu
uuuu uuuu
WREG
PIC18F2XK20 PIC18F4XK20
xxxx xxxx
uuuu uuuu
uuuu uuuu
INDF1
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
POSTINC1
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
POSTDEC1
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
PREINC1
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
PLUSW1
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
Legend:
Note 1:
2:
3:
4:
5:
6:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as
PORTA pins, they are disabled and read ‘0’.
All bits of the ANSELH register initialize to ‘0’ if the PBADEN bit of CONFIG3H is ‘0’.
 2010 Microchip Technology Inc.
DS41303G-page 59