PIC18F25K20T-ISS Datasheet, PDF (451/456 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology

Timer1 .............................................................................. 159
16-Bit Read/Write Mode ........................................... 162
Associated Registers ............................................... 165
Asynchronous Counter Mode .................................. 161
Reading and Writing ........................................ 161
Interrupt .................................................................... 163
Operation ................................................................. 160
Oscillator .......................................................... 159, 162
Oscillator Layout Considerations ............................. 163
Overflow Interrupt .................................................... 159
Prescaler .................................................................. 161
Resetting, Using the CCP Special Event Trigger ..... 163
Special Event Trigger (ECCP) ................................. 174
TMR1H Register ...................................................... 159
TMR1L Register ....................................................... 159
Use as a Real-Time Clock ....................................... 164
Timer2 .............................................................................. 167
Associated Registers ............................................... 168
Interrupt .................................................................... 168
Operation ................................................................. 167
Output ...................................................................... 168
Timer3 .............................................................................. 169
16-Bit Read/Write Mode ........................................... 171
Associated Registers ............................................... 172
Operation ................................................................. 170
Oscillator .......................................................... 169, 171
Overflow Interrupt ............................................ 169, 171
Special Event Trigger (CCP) .................................... 172
TMR3H Register ...................................................... 169
TMR3L Register ....................................................... 169
Timing Diagrams
A/D Conversion ........................................................ 402
Acknowledge Sequence .......................................... 228
Asynchronous Reception ......................................... 245
Asynchronous Transmission .................................... 240
Asynchronous Transmission (Back to Back) ........... 241
Auto Wake-up Bit (WUE) During Normal
Operation ......................................................... 255
Auto Wake-up Bit (WUE) During Sleep ................... 255
Automatic Baud Rate Calculator .............................. 254
Baud Rate Generator with Clock Arbitration ............ 222
BRG Reset Due to SDA Arbitration During
Start Condition ................................................. 231
Brown-out Reset (BOR) ........................................... 388
Bus Collision During a Repeated Start Condition
(Case 1) ........................................................... 232
Bus Collision During a Repeated Start Condition
(Case 2) ........................................................... 233
Bus Collision During a Start Condition (SCL = 0) .... 231
Bus Collision During a Stop Condition (Case 1) ...... 234
Bus Collision During a Stop Condition (Case 2) ...... 234
Bus Collision During Start Condition (SDA only) ..... 230
Bus Collision for Transmit and Acknowledge ........... 229
Capture/Compare/PWM (CCP) ................................ 390
CLKO and I/O .......................................................... 387
Clock Synchronization ............................................. 215
Clock/Instruction Cycle .............................................. 69
Comparator Output .................................................. 279
Example SPI Master Mode (CKE = 0) ..................... 392
Example SPI Master Mode (CKE = 1) ..................... 393
Example SPI Slave Mode (CKE = 0) ....................... 394
Example SPI Slave Mode (CKE = 1) ....................... 395
External Clock (All Modes except PLL) .................... 384
Fail-Safe Clock Monitor (FSCM) ................................ 41
First Start Bit Timing ................................................ 223
PIC18F2XK20/4XK20
Full-Bridge PWM Output .......................................... 180
Half-Bridge PWM Output ................................. 178, 185
High/Low-Voltage Detect Characteristics ................ 382
High/Low-Voltage Detect Operation
(VDIRMAG = 0) ............................................... 295
High/Low-Voltage Detect Operation
(VDIRMAG = 1) ............................................... 296
I²C Bus Data ............................................................ 396
I²C Bus Start/Stop Bits ............................................ 396
I²C Master Mode (7 or 10-Bit Transmission) ........... 226
I²C Master Mode (7-Bit Reception) ......................... 227
I²C Slave Mode (10-Bit Reception, SEN = 0) .......... 211
I²C Slave Mode (10-Bit Reception, SEN = 1) .......... 217
I²C Slave Mode (10-Bit Transmission) .................... 212
I²C Slave Mode (7-bit Reception, SEN = 0) ............ 209
I²C Slave Mode (7-Bit Reception, SEN = 1) ............ 216
I²C Slave Mode (7-Bit Transmission) ...................... 210
I²C Slave Mode General Call Address
Sequence (7 or 10-Bit Address Mode) ............ 218
I²C Stop Condition Receive or Transmit Mode ........ 228
Internal Oscillator Switch Timing ............................... 39
Master SSP I²C Bus Data ....................................... 398
Master SSP I²C Bus Start/Stop Bits ........................ 398
Parallel Slave Port (PIC18F4XK20) ......................... 391
Parallel Slave Port (PSP) Read ............................... 140
Parallel Slave Port (PSP) Write ............................... 140
PWM Auto-shutdown
Auto-restart Enabled ........................................ 184
Firmware Restart ............................................. 184
PWM Direction Change ........................................... 181
PWM Direction Change at Near 100% Duty Cycle .. 182
PWM Output (Active-High) ...................................... 176
PWM Output (Active-Low) ....................................... 177
Repeat Start Condition ............................................ 224
Reset, Watchdog Timer (WDT), Oscillator Start-up
Timer (OST), Power-up Timer (PWRT) .......... 388
Send Break Character Sequence ............................ 256
Slave Synchronization ............................................. 199
Slow Rise Time (MCLR Tied to VDD,
VDD Rise > TPWRT) ............................................ 57
SPI Mode (Master Mode) ........................................ 198
SPI Mode (Slave Mode, CKE = 0) ........................... 200
SPI Mode (Slave Mode, CKE = 1) ........................... 200
Synchronous Reception (Master Mode, SREN) ...... 261
Synchronous Transmission ..................................... 258
Synchronous Transmission (Through TXEN) .......... 258
Time-out Sequence on POR w/PLL Enabled
(MCLR Tied to VDD) .......................................... 57
Time-out Sequence on Power-up (MCLR
Not Tied to VDD, Case 1) ................................... 56
Time-out Sequence on Power-up (MCLR
Not Tied to VDD, Case 2) ................................... 56
Time-out Sequence on Power-up (MCLR
Tied to VDD, VDD Rise < TPWRT) ....................... 56
Timer0 and Timer1 External Clock .......................... 389
Timer1 Incrementing Edge ...................................... 161
Transition for Entry to Sleep Mode ............................ 46
Transition for Wake from Sleep (HSPLL) .................. 46
Transition Timing for Entry to Idle Mode .................... 47
Transition Timing for Wake from Idle to
Run Mode .......................................................... 47
USART Synchronous Receive (Master/Slave) ........ 400
USART Synchronous Transmission
(Master/Slave) ................................................. 400
Timing Diagrams and Specifications ............................... 384
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DS41303G-page 451