PIC24FJ128GA010_12 Datasheet, PDF (53/258 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA010 FAMILY
REGISTER 5-1: NVMCON: FLASH MEMORY CONTROL REGISTER
R/SO-0⁽¹⁾
R/W-0⁽¹⁾
R/W-0⁽¹⁾
U-0
U-0
U-0
WR
WREN
WRERR
—
—
—
bit 15
U-0
U-0
—
—
bit 8
U-0
—
bit 7
R/W-0⁽¹⁾
U-0
ERASE
—
U-0
R/W-0⁽¹⁾
R/W-0⁽¹⁾
R/W-0⁽¹⁾
R/W-0⁽¹⁾
—
NVMOP3⁽²⁾ NVMOP2⁽²⁾ NVMOP1⁽²⁾ NVMOP0⁽²⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
SO = Settable Only bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3-0
WR: Write Control bit
1 = Initiates a Flash memory program or erase operation. The operation is self-timed and the bit is
cleared by hardware once operation is complete.
0 = Program or erase operation is complete and inactive
WREN: Write Enable bit
1 = Enables Flash program/erase operations
0 = Inhibits Flash program/erase operations
WRERR: Write Sequence Error Flag bit
1 = An improper program or erase sequence attempt or termination has occurred (bit is set automatically
on any set attempt of the WR bit)
0 = The program or erase operation completed normally
Unimplemented: Read as ‘0’
ERASE: Erase/Program Enable bit
1 = Performs the erase operation specified by NVMOP<3:0> on the next WR command
0 = Performs the program operation specified by NVMOP<3:0> on the next WR command
Unimplemented: Read as ‘0’
NVMOP<3:0>: NVM Operation Select bits⁽²⁾
1111 = Memory bulk erase operation (ERASE = 1) or no operation (ERASE = 0)⁽³⁾
0011 = Memory word program operation (ERASE = 0) or no operation (ERASE = 1)
0010 = Memory page erase operation (ERASE = 1) or no operation (ERASE = 0)
0001 = Memory row program operation (ERASE = 0) or no operation (ERASE = 1)
Note 1:
2:
3:
These bits can only be reset on a POR.
All other combinations of NVMOP<3:0> are unimplemented.
Available in ICSP™ mode only. Refer to the device programming specifications.
 2005-2012 Microchip Technology Inc.
DS39747F-page 53