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PIC24FJ128GA010_12 Datasheet, PDF (116/258 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers | |||
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PIC24FJ128GA010 FAMILY
REGISTER 12-1: TxCON: TIMER2 AND TIMER4 CONTROL REGISTER
R/W-0
U-0
R/W-0
U-0
U-0
U-0
U-0
TON
â
TSIDL
â
â
â
â
bit 15
U-0
â
bit 8
U-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
U-0
â
TGATE
TCKPS1 TCKPS0
T32(1)
â
TCS
â
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
TON: Timerx On bit
When TxCON<3> = 1:
1 = Starts 32-bit Timerx/y
0 = Stops 32-bit Timerx/y
When TxCON<3> = 0:
1 = Starts 16-bit Timerx
0 = Stops 16-bit Timerx
Unimplemented: Read as â0â
TSIDL: Stop in Idle Mode bit
1 = Discontinues module operation when the device enters Idle mode
0 = Continues module operation in Idle mode
Unimplemented: Read as â0â
TGATE: Timerx Gated Time Accumulation Enable bit
When TCS = 1:
This bit is ignored.
When TCS = 0:
1 = Gated time accumulation is enabled
0 = Gated time accumulation is disabled
TCKPS<1:0>: Timer2 Input Clock Prescale Select bits
11 = 1:256
10 = 1:64
01 = 1:8
00 = 1:1
T32: 32-Bit Timer Mode Select bit(1)
1 = Timerx and Timery form a single 32-bit timer
0 = Timerx and Timery act as two 16-bit timers
Unimplemented: Read as â0â
TCS: Timerx Clock Source Select bit
1 = External clock from pin, TxCK (on the rising edge)
0 = Internal clock (FOSC/2)
Unimplemented: Read as â0â
Note 1: In 32-bit mode, the T3CON or T5CON control bits do not affect 32-bit timer operation.
DS39747F-page 116
ï£ 2005-2012 Microchip Technology Inc.
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