PIC24FJ128GA010_12 Datasheet, PDF (139/258 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA010 FAMILY
16.2 Setting Baud Rate When
Operating as a Bus Master
To compute the Baud Rate Generator reload value, use
the following equation:
EQUATION 16-1:⁽¹⁾
I2CxBRG = (FCY/FSCL – FCY/10,000,000) – 1
Note 1: Based on FCY = FOSC/2; Doze mode and
PLL are disabled.
16.3 Slave Address Masking
The I2CxMSK register (Register 16-3) designates
address bit positions as “don’t care” for both 7-Bit and
10-Bit Addressing modes. Setting a particular bit loca-
tion (= 1) in the I2CxMSK register causes the slave
module to respond, whether the corresponding
address bit value is a ‘0’ or ‘1’. For example, when
I2CxMSK is set to ‘00100000’, the slave module will
detect both addresses, ‘0000000’ and ‘00100000’.
To enable address masking, the IPMI (Intelligent
Peripheral Management Interface) must be disabled by
clearing the IPMIEN bit (I2CxCON<11>).
TABLE 16-1: I²C™ CLOCK RATES^(1,3,4)
Required
System
FSCL
I2CxBRG Value
FCY
(Decimal)
(Hexadecimal)
100 kHz
16 MHz
157
9D
100 kHz
8 MHz
78
4E
100 kHz
4 MHz
39
27
400 kHz
16 MHz
37
25
400 kHz
8 MHz
18
12
400 kHz
4 MHz
9
9
400 kHz
2 MHz
4
4
1 MHz
16 MHz
13
D
1 MHz
8 MHz
6
6
1 MHz
4 MHz
3
3
Note 1:
2:
3:
4:
Based on TCY = TOSC * 2; Doze mode and PLL are disabled.
This is the closest value to 400 kHz for this value of FCY.
FCY = 2 MHz is the minimum input clock frequency to have FSCL = 1 MHz.
I2CxBRG cannot have a value of less than 2.
Actual
FSCL
100 kHz
100 kHz
99 kHz
404 kHz
404 kHz
385 kHz⁽²⁾
385 kHz⁽²⁾
1,026 KHz
1,026 KHz
909 KHz
As a result of changes in the I²C protocol, several I²C
addresses are reserved and will not be Acknowledged
in Slave mode.
TABLE 16-2: RESERVED I²C™ ADDRESSES⁽¹⁾
Address masking does not affect behavior. Refer to
Table 16-2 for a summary of these reserved addresses.
.
Slave Address
R/W Bit
Description
Note 1:
2:
3:
0000 000
0
General Call Address⁽²⁾
0000 000
1
Start Byte
0000 001
x
CBUS Address
0000 010
x
Reserved
0000 011
x
Reserved
0000 1xx
x
HS Mode Master Code
1111 1xx
x
Reserved
1111 0xx
x
10-Bit Slave Upper Byte⁽³⁾
The above address bits will not cause an address match, independent of address mask settings.
The address will be Acknowledged only if GCEN = 1.
A match on this address can only occur on the upper byte in 10-Bit Addressing mode.
 2005-2012 Microchip Technology Inc.
DS39747F-page 139