MT41J256M4 Datasheet, PDF(159/181 Page) Micon Design Technology Corporation – 1Gb: x4, x8, x16 DDR3 SDRAM

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MT41J256M4 Datasheet, PDF (159/181 Pages) Micon Design Technology Corporation – 1Gb: x4, x8, x16 DDR3 SDRAM

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1Gb: x4, x8, x16 DDR3 SDRAM

Operations

Figure 109: RESET Sequence

System RESET

(warm boot)

Stable and

valid clock T0

T1

tCK

CK#

CK

T (MIN) =

MAX (10ns, 5tCK)

tCL

tCL

T = 100ns (MIN)

tIOZ

RESET#

T=10ns (MIN)

tIS

CKE

Ta0

Tb0

Tc0

Td0

Valid

ODT

Command

tIS

NOP

Valid

Valid

Valid

Valid

MRS

MRS

MRS

MRS

ZQCL

Valid

DM

Address

Code

Code

Code

Code

Valid

A10

BA[2:0]

DQS

DQ

RTT

All voltage

supplies valid

and stable

Code

Code

Code

Code

A10 = H

Valid

High-Z

High-Z

High-Z

BA0 = L

BA1 = H

BA2 = L

BA0 = H

BA1 = H

BA2 = L

BA0 = H

BA1 = L

BA2 = L

BA0 = L

BA1 = L

BA2 = L

Valid

T = 500Âµs (MIN)

tXPR

tMRD

tMRD

tMRD

tMOD

MR2

DRAM ready

for external

commands

MR3

MR1 with

DLL ENABLE

MR0 with

DLL RESET

ZQ CAL

tZQINIT

tDLLK

Normal

operation

Indicates A Break in

Time Scale

Donât Care

PDF: 09005aef826aa906/Source: 09005aef82a357c3

1Gb_DDR3_4.fm - Rev. D 8/1/08 EN

159

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